Byte Magazine Volume 00 Number 03 - Is This Next

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The Computer System You Hove Been Waiting For A BENCHMARK SYSTEM—Using the MOTOROLA M6800 benchmark microprocessor family.

Wl/llllliii,,..

. • «**•»#<•• COMPUTER

gjiilii B800 Svstem

Southwest Technical Products is proud to introduce the M6800 computer system. This system is based upon the Motorola MC6800 microprocessor unit (MPU) and it's matching family of support devices. The 6800 system was chosen for our computer because this set of parts is currently in our opinion the "Benchmark Family" for microprocessor systems. It makes it possible for us to provide you with a computer system having outstanding versitility and ease of use.

In addition to the outstanding hardware system, the Motorola 6800 has without question the most complete set of documentation yet made available for a microprocessor system. The 714 page Applications Manual for example contains material on programming techniques, system organization, input/output techniques, and more. Also available is the Programmers Manual which details the various types of software available for the system and provides instructions for the programming and use of the unique interface system that is part of the 6800 design. The M6800 system minimizes the number of required components and support parts, provides extremely simple interfacing to external devices and has outstanding documentation.

Our kit combines the MC6800 processor with the MIKBUG® read-only memory (ROM). This ROM contains the program necessary to automatically place not only a loader, but also a mini-operating system into the computers memory. This makes the computer very convenient to use because it is ready for you to enter data from the terminal keyboard the minute power is turned "ON". Our kit also provides a serial control interface to connect a terminal to the system. This is not an extra cost option as in some inexpensive computers. The system is controlled from any ASCII coded terminal that you may wish to use. Our CT-1024 video terminal is a good choice. The control interface will also work with any 20 Ma. Teletype using ASCI I code, such as the ASR-33, or KSR-33. The main memory in our basic kit consists of 2,048 words (BYTES) of static memory. This eliminates the need for refresh interrupts and allows the system to operate at full speed at all times. Our basic kit is supplied with processor system, which includes the MIKBUG ROM, a 128 word static scratch pad RAM, and clock oscillator bit rate divider; main memory board with 2,048 words, a serial control interface, power supply, cabinet with cover and complete assembly and operation instructions which include test programs and the Motorola Programmers Manual.

If you have a Motorola 6800 chip set, we will sell you boards, or any major part of this system as a separate item. If you would like a full description and our price list, circle the reader service number or send the coupon today. Prices for a complete basic kit begin at only S450.00.

MAIL THIS COUPON TODAY

□ Enclosed is $450.00 □ or Master C. # Bank #.

□ or BAC # Ex Date

For My SWTPC Computer KitQ NAME

I | Send data package

ADDRESS CITY

Southwest Technical Products Corp., Box 32040, San Antonio, Texas 78284

The MODULAR MICROS from MARTIN RESEARCH

Here's why the new MIKE 2 and MIKE 3 are the best values in microcomputers today!

8008 OR 8080

Martin Research has solved the problem bothering many potential micro users .... whether to go with the economical 8008 microprocessor, or step up to the powerful 8080. Our carefully designed bus structure allows either processor to be used in the same system!

The MIKE 3 comes with an 8080 CPU board, complete with crystal-controlled system timing. The MIKE 2 is based on the 8008. To upgrade from an 8008 to an 8080, the user unplugs the 8008 CPU board and plugs in the 8080 CPU. Then he unplugs the 8008 MONITOR PROM, and plugs in the 8080 MONITOR PROM, so that the system recognizes the 8080 instruction set. That's about it!

If the user has invested in slow memory chips, compatible with the 8008 but too slow for the 8080 running at full speed, he will have to make the 8080 wait for memory access—an optional feature on our boards. Better still, a 4K RAM board can be purchased from Martin Research with fast RAM chips, capable of 8080 speeds, at a cost no more that you might expect to pay for much slower devices.

In short, the MIKE 2 user can feel confident in developing his 8008 system with expanded memory and other features, knowing that his MIKE 2 can be upgraded to a MIKE 3—an 8080 system—in the future.

EASE OF PROGRAMMING

Instructions and data are entered simply by punching the 20-pad keyboard. Information, in convenient octal format, appears automatically on the sevensegment display. This is a pleasant contrast to the cumbersome microcomputers which require the user to handle all information bit-by-bit, with a confusing array of twenty-odd toggle switches and over thirty red lights!

A powerful MONITOR program is included with each microcomputer, stored permanently in PROM memory. The MONITOR continuously scans the keyboard, programming the computer as keys are depressed.

Say the user wishes to enter the number 135 (octal for an 8008 OUTPUT 16 instruction). He types 1, and the righthand three digits read 001. Then he presses 3, and the digits say 013. Finally he punches the 5, and the display reads 135. Notice how the MONITOR program (Continued in column 3.)

Family

& £. SL

' 7 1 4

8 5

9 6

1 1

2

3

Lc

0

•

Introducing the family of modular micros from Martin Research!

Choose either the economical 8008 processor, or the powerful 8080. Either CPU is compatible with our advanced bus structure! Plus, a convenient monitor program, in PROM memory, allows you to enter instructions with the ease of a handheld calculator. Six large digits display data in octal format.

Modularity makes for easy expansion. First quality parts throughout. Professionally made PC boards with plated holes, soldermask protection. 8080 CPU board features versatile interrupt structure, multiprocessing capability. Easy interfacing to input and output ports.

MIKE 303A: CPU board with 8080, key board/display board, PROM/RAM board monitor PROM (256 bytes of RAM), breadboard, hardware, and instructions: $395.00 kit, $495.00 assembled and tested. MIKE 203A: CPU board with 8008, keyboard/display, PROM/RAM, breadboard, hardware, and instructions: $270.00 kit, $345.00 A&T.

MIKE 3-5 or 2-5: 4K RAM board with 450 ns static RAM: $165.00 kit, $190.00 A&T.

FREE

CATALOG!

Kits: US & Canada only. Master Charge accepted. OEMs: write for quantity prices.

MARTIN RESEARCH

Microcomputer Design 1825 S. Halsted St. Chicago. IL 60608 (312) 829-6932

shifts each digit left automatically as a new digit is entered! The value on the display is also entered into an internal CPU register, ready for the next operation. Simply by pressing the write key, for example, the user loads 135 into memory.

The MONITOR program also allows the user to step through memory, one location at a time (starting anywhere), to check his programming. Plus, the Swap Register Option allows use of the interrupt capabilities of the microprocessor: the MONITOR saves internal register status upon receipt of an interrupt request; when the interrupt routine ends, the main program continues right where it left off.

We invite the reader to compare the programmability of the MIKE family of microcomputers to others on the market. Notice that some are sold, as basic units, without any memory capacity at all. This means they simply cannot be programmed, until you purchase a memory board as an "accessory." Even then, adding RAM falls far short of a convenient, permanent MONITOR program stored in PROM. Instead, you have to enter your frequently-used subroutines by hand, each and every time you turn the power on.

EASY I/O INTERFACE

The MIKE family bus structure has been designed to permit easy addition of input and output ports. A hardware interface to the system generally needs only two chips—one strobe decoder, and one latching device (for output ports) or three-state driving device (for inputs). A new I/O board can be plugged in anywhere on the bus; in fact, all the boards in the micro could be swapped around in any position, without affecting operation. I/O addresses are easy to modify by reconnecting the leads to the strobe decoder (full instructions are provided); this is in marked contrast to the clumsy input multiplexer approach sometimes used.

POWER & HOUSING

The micros described to the left are complete except for a cabinet of your own design, and a power supply. The basic micros require +5 V, 1.4 A, and —9 V, 100 MA. The 4K RAM board requires 5 V, 1 A. A supply providing these voltages, and ±12 V also, will be ready soon.

OPTIONS

A number of useful micro accessories are scheduled for announcement. In addition, the MIKE 3 and MIKE 2 may be purchased in configurations ranging from unpopulated cards to complete systems. For details, phone, write, or check the reader service card.

RlGS ELECTROIUflCS]

DISCOUNTS: 10% OFF ORDERS OVER $25.00; 20% OFF ORDERS OVER $250.00.

SPECIAL

1-8008 S50

8-2102

ANOTHER POWER SUPPLY . . .

PS 25—1 0 to 25v 1a lab type power supply with adjustable current limiting; remote sensing & remote programming for voltage & current. Insturctions included. All parts except chassis, meter(s), p.c. board. Kit of parts with schematics. S14.95

P.C. boards available, No. 007 S3.00 ea.

2K RAM BOARD KIT. ALL PARTSINCL. SOCKETS

$84.50

ICs

8008 MICROCOMP. CHIP$30.95 2102 1K STATIC RAM 3.00

5203 256x8 PROM 15.00

5204 512x8 PROM 25.00

INFO ON ABOVE CHIPS IF ASKED FOR.

ORDERS OF $50 OR MORE GET FREE BYTE SUBSCRIPTION IF ASKED FOR (CONTINENTAL U.S. ONL Y).

008A MICROCOMPUTER KIT

8008 CPU, 1024 x 8 memory; memory is expandable. Kit includes manual with schematic, programming instructions and suggestions; all ICs and parts supplied except cabinet, fuses & hardware. Includes p. c. boards. $375.00

MANUAL ONLY, $25.00 (no discount on manual)

008A-K ASCII keyboard input kit. $135.00

008A-C Audio cassette adapter kit. $100.00

Details on computer, peripheral kits in our flyer.

RGS ELECTRONICS 3650 Charles St., Suite K ■ Santa Clara, CA 95050 ■ (408) 247-0158

We sell many ICs and components not listed in this ad. Send a stamp for our free flyer. TERMS OF SALE: All orders prepaid; we pay postage. SI.00 handling charge on orders under S10.00. California residents please include sales tax. Please include name, address and zip code on all orders and flyer requests. Prices subject to change without notice.

In the Queue

Foreground

INS AND OUTS OF VOLATILE MEMORIES 12

Hardware — Lancaster COMPUTERS ARE RIDICULOUSLY SIMPLE 20

Principles of Operation — Wadsworth COMPUTERS AND AMATEUR RADIO 42

Applications — Gipe SON OF MOTOROLA (OR, THE $20 CPU CHIP) 56

Chip Designs — Fylstra

Background

HEXPAWN - PROJECT IN ARTIFICIAL INTELLIGENCE . . .36

Software — Wier NOTES ON PARALLEL OUTPUT INTERFACES 52

Hardware — Carl Helmers MONITOR 81/2- YOUR OWN PSEUDO INSTRUCTIONS 64

Software — Nico VERSATILE READ ONLY MEMORY PROGRAMMER 66

Hardware — Peter Helmers

Nucleus

BYTE magazine is published monthly by Green Publishing, Inc., Peterborough, New Hampshire 03458. Subscription rates are $12 for one year worldwide. Two years, $22. Three years, $30. Second class postage application pending at Peterborough, New Hampshire 03458 and at additional mailing offices. Phone: 603-924-3873. Entire contents copyright 1975 by Green Publishing, Inc., Peterborough, NH 03458. In case you were wondering, last month's cover had pictures of several MITS and SWTCP computer kit boards.

From the Publisher 5, 82

Speaking of Computers 6, 90

Book Reviews 11

Byter's Digest 46, 72, 79

Clubs and Newsletters 77

Diagnostics 78

Letters 84

BOMB 88

Reader's Service 96

Contract:

The subscriber or

purchaser of this magazine agrees to the following software conditions . . . not to resell this magazine for less than 50% of the cover price . . . not to give the magazine away at any time in the future ... or to lend it . . . or rent it or in arty other way permit anyone to become privy to the

material published within these pages. Purchaser agrees to display this copy of BYTE to as many computer addictees as possible, but to limit their perusal to the cover and table of contents pages. This agreement holds not only for casual acquaintances, but also for personal friends, blood relatives, and even wives.

WII # 3

NOVEMBER 1975

i II II I

P. 6

p. 12

p. 36

p. 42

i h 0I ■

—|i2'8PROMSJ 02 ^"^"N

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PROM SOCKETS ,

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p. 66

COVER: See page 5.

Part

Model

Row Dim.

Number

Price

TC-8

.3 IN.

923695

$7.35

TC-14

.3 IN.

923698

4.50

TC-16

3IN.

923700

4.75

TC-16 LSI

.5/.6 IN.

923702

8.95

TC-18

.3IN.

923703

10.00

TC-20

3IN.

923704

11.55

TC-22

.4 IN.

923705

11.55

TC-24

.5/.6 IN.

923714

13.85

TC-28

.5/.6 IN.

923718

15.25

TC-36

.5/6 IN.

923720

19.95

TC-40

.5/.6 IN.

923722

21.00

for fast, non-shorting access to all leads on dual-in-line IC packages

No more shorting across DIP leads... just quickly clip on an IC TEST CLIP to bring DIP leads out for safe attachment of scope probes and other leads. Ideal for signal input, tracing, troubleshooting, etc. Patented precision, "contact comb" design guarantees no shorting between DIP leads. Probes can hang "no-hands" free on Test Clip terminals in card racks (unique — see photo). Engineered Mechanical clamping plus gold-plated phosphor bronze terminals provide superior electrical contact. Also unequaled as a DIP removal tool.

We honor M.C. and B.A.C. charges.

Add sales tax on OH and CA orders.

(F.O.B. Painesville on company P.O.'s.)

Dealer inquiries in vited

Add—»• fees from this chart.

SHIPPING/HANDLING

Up to $10.00 S1.00

$10.01 IQ $25.00 1.50 25.01 to 50.00 2.00

All products guaranteed to meet or exceed published specifications

AP PRODUCTS INCORPORATED

Box 110-G • Painesville. OH 44077 • 216/354-2101

^^^

solderless

plug-in tie-points

fastest, most reliable

method known...to build, test

and modify experimental circuits

8 bus distribution system plus universal .1" by .1" matrix of solderless, plug-in tie points

all in one integral device.

Accepts all DIP's and discretes with leads up to .032" dia.

Interconnect with any solid wire up to No.20A.W.G.

ORDER BY PART NUMBER

923252 [nickel-silver terminals) $17.00

923748 lsoM-plaled terminals) $18.90

High-performance A P SuperStrip component matrices consist of 128 terminals of 5 tie points each. The 8 buses of 5 connected 5-tie-point terminals are for voltage, ground, reset and clock lines, shift command, etc. New, non-shorting, insjant-mount backing and quick-removal screws are supplied... use several Super-Strips to create large-scale breadboards on panels up to 1/8" thick.

We honor M.C. and B.A.C. charges.

Add sales tax on OH and CA orders.

(F.O.B. Painesville on company P.O.'s.)

Dealer inquiries invited

Add—•fees from this chart.

SHIPPING/HANDLING

Up to $10.00 51.00

$10.01 to $25.00 1.50 25.01 to 50.00 2.00

All products guaranteed to meet or exceed published specifications

AP PRODUCTS INCORPORATED

Box 110-G* Painesville, OH 44077 • 216/354-2101

try

**?&**

Super-Versatile7

building blocks for experimental circuits

Universal .10" matrices of solderless, plug-in tie points

For all DIP's and discretes with leads to .032" dia.

Interconnect with any solid wire up to No. 20 A.W.G.

Nickel-silver terminals

ORDER BY PART NUMBER 923277 distribution strip ... $2.50 923261 terminal strip $12.50

Create custom breadboards in minutes with these new instant-mount strips. DISTRIBUTION STRIP (top) contains 2 continuous buses of 12 connected 4tie-point terminals. Size: 6.5" by .35". TERMINAL STRIP contains 128 5-tiepoint terminals, holds up to nine 14-pin DIP's. Size: 6.5" by 1.36". Integral, non-shorting, instant-mounting backing permits quick build-up of special breadboards using any mix of strips.

Other models available.

We honor M.C. and B.A.C. charges.

Add sales tax on OH and CA orders.

(F.O.B. Painesville on company P.O.'s.)

Dealer inquiries in vited

Add—»fees from this chart.

SHIPPING/HANDLING

Up to $10.00 $1.00

$10.01 to $25.00 1.50 25.01 to 50.00 2.00

All products guaranteed to meet or exceed published specifications

AP PRODUCTS INCORPORATED

Box 110-G* Painesville, OH 44077 • 216/354-2101

hurrt * erfo"*1* circuit Otor2n

trV

models

for fast

building and]

testing of

. circuits.

photo ACE 227

On all models... simply plug in your /* components and interconnect with 22-ga. solid wire. All models accept all DIP's, TO-5's and discretes with leads up to .032" diameter. Multiple buses can easily be linked for power and ground distribution, reset and clock lines, shift command, etc. Bases: gold-anodized aluminum. Terminals: non-corrosive nickel-silver. Four rubber feet included.

obsoletes *

ordinary

breadboards

Order No.

923333 923332 923334 923331 923326 923325 923324

ACE Model No.

200-K Ikitl 208 lassBm.l 201-K Ikitl 212 (assem.) 218 (assem.) 227 lassem.) 236 (assem.)

Tie

DIP

No.

No.

Points

Capacity

Busee

Roots

728

8 116-s]

2

2

872

8(16's)

8

2

1032

12(14's)

2

2

1224

12(14'sl

8

2

1760

18(14's)

10

2

2712

27 114's)

28

4

3648

36 114's)

36

4

Board Size

(inches)

4-9/16x5-9/16 4-9/16 x 5-9/16 4-9/16 X 7 4-9/16x7 6-1/2 X7-1/8 8x9-1/4 10-1/4x9-1/4

Price Each

We honor M.C. and B.A.C. charges.

Add sales tax on OH and CA orders.

(F.O.B. Painesville on company P.O.'s.)

Dealer inquiries in vited

Add *

fees from this chart.

SHIPPING/HANDLING

Upto$10.00 $1.00

S10.01 to $25.00 1.50 25.01 to 50.00 2.00

818.95 28.95 24.95 34.95 46.95 59.95 79.95

COD.

All products guaranteed to meet or exceed published specifications

AP PRODUCTS INCORPORATED

Box 110-G* Painesville, OH 44077 • 216/354-2101

from the Publisher.

Aggravated shock. How else can I describe my state of mind after innocently turning my newly acquired Altaic 8800 around, looking for places to plug in Teletypes and television typewriters.

After forty years of turning around electronic equipment to plug things in, this time there was nothing there except the line cord. Nothing! Not even a lousy phone jack.

High fidelity amplifiers have the controls and switches on the front panel and the terminals and jacks on the back like any decent piece of equipment ought. As a matter of fact, some of the amplifiers these days have just about gone berserk with jacks and terminals. I had no problem plugging in my stereo phono and the tape

recorder, but I haven't located any source of auxes as yet for that line. It's in stereo too. Know anyone with a good stereo aux for sale — cheap?

Ham transmitters and transceivers have lots of places to plug things in all over the back panel. I notice, upon checking, that some of them have a place for my aux, if I manage to get one. It'll get a lot of use.

Maybe the jacks are inside, I thought. So I unscrewed the lid and slid it back - still no terminals, no jacks, no plugs, no connectors, nothing! In desperation I grabbed the instruction book. It was a thick one so I moved to a comfortable chair, adjusted the light, and started reading about gates, truth tables, and I fell asleep. You wouldn't

believe the crook in my neck that chair gave me when I tried to get out of it the next morning.

Now, after having read as far as I could in the instruction book and after talking with a number of experts and even visiting the MITS factory, I am beginning to suspect that I am going to have to do a good deal more than just plug in a Teletype machine to hook into my Altair. Interface is the buzz word. It means not only plugging it in, but doing so in a way that will enable it to work.

My Teletype machines have distributors built-in, which means that the Beau's Dots come out one after the other rather than all at once

Continued on page 96

The wave of the future? This is a shop in a mall in Dallas.

EITI

staff

EDITOR

Carl T. Helmers Jr.

PUBLISHER

Wayne Green

MANAGING EDITOR

Judith Havey

ASSOCIATE EDITORS

Dan Fylstra

Chris Ryland

CONTRIBUTING EDITORS

Hal Chamberlin

Don Lancaster

ASSISTANT EDITORS

John C. Burnett

Susan G. Philbrick

PRODUCTION MANAGER

Lynn Panciera-Fraser

ART DEPARTMENT

Nancy Estle

Neal Kandel

Peri Mahoney

Bob Sawyer

PRINTING

Biff Mahoney

PHOTOGRAPHY

Bill Heydolph

Ed Crabtree

TYPESETTING

Barbara J. Latti

Marge McCarthy

ADVERTISING

Bill Edwards

Nancy Cluff

CIRCULATION

Susan Chandler

Dorothy Gibson

Pearl Lahey

Lorraine Morton

Judy Waterman

INVENTORY CONTROL

Marshall Raymond

DRAFTING

Bill Morello

COMPTROLLER

Knud E. M. Keller

Carl Helmers

The State of The Art

If there is one facet of the small computer field which is its most exciting, that is probably its rapid change and evolution unfolding before all us users of the technology. The fact that a magazine such as BYTE can even exist (let alone get its enthusiastic reception) is evidence of the considerable changes which have occurred in the home computer field over the past year or two. Any attempt such as this to characterize the current "state of the art" is doomed to rapid obsolescence. Be that as it may, I won't let that deter me from characterizing the field as I see it now.

Just what is this "art" that I'm talking about? When I talk about art in this sense, I mean the body of technological know-how available for personal computing plus the attitudes and abilities of the people who use this know-how. An analogy or two: The state of the art in a form such as painting reflects both the latest developments in the pigmentation materials field and the creative talents and attitudes of the people who use this technology for

Any attempt to specify the state of the art in this field is doomed to practically instant obsolescence . . .

expressive purposes. The state of the art in music is a combination of the technology of music production — traditional to electronic/digital — plus the aesthetic and creative tastes of the musicians and composers who use the technology. So it is as well with computing. There is the technological state of the art as it exists — a transient thing at present — together with the creative uses to which people such as you or I put these wonderful technological devices.

A Recent State of the Art. . .

A few years ago, the state of the art in hardware was pretty primitive — in othcr words, one had to be a really persevering person to get something in computing which worked and cost less than $1000. To give you an example, I got a call from Dick Snyder of Chelmsford, Mass., shortly after BYTE #1 came out. (See Dick's letter in the letters column of this issue.) As a result of our conversation, I stopped at Dick's house on the way back from Peterborough one weekend in August and took a look at his premicrocomputer home brew computer, a really beautiful piece of work. He had completely designed and built - in 1972 and 1973 - a miniature 4-bit computer with 256 nybbles of memory using the Data General NOVA minicomputer as his inspiration. He built the machine using painstakingly accurate soldering with a miniature iron, sockets for over 170 integrated circuits,

and a very compact housing. The most unusual feature of all was the use of water cooling to keep his 16 7489 memory chips cool (said water cooling consisting of plastic bag baby bottles filled with water and sealed with rubber bands). Yet it works! And — he has built up quite an impressive array of software for his one-of-a-kind machine, including a very appealing simulation of a priority-driven real time operating system with three tasks in the queue. The entire program for this simulation is done in 256 nybbles (half-bytes) of memory with the 16 instructions of his design. The result is an impressive changing display of marker patterns in his front panel lights as the various tasks swap in and out of execution. Dick Snyder's machine is the state of the art, circa 1972-1973, to a large extent — microcomputers were not yet widely available to the general populace of personal computing hackers. Dick tells me that he spent about $600 on the parts of his computer at 1972 prices for SSI and MSI TTL integrated circuits. But now, in 1975 after the first wave of 8008 computer kit products and the rising tide of the "first generation" personal computer systems, that same $600 can buy a lot more function. In 1975 we saw the introduction of the MITS ALTAI R - which turns out to be a very good computer after initial slow deliveries due to unanticipated demand — and a host of new machines such as Bill Godbout's PACE, the

SWTPC 6800 kit, the MITS 6800 kit and several other systems.

The Benchmark of a Small Computer System

In the engineering and software professions, it is often common to dream up "benchmarks" to help in the evaluation of systems. This term, benchmark, was adopted by systems engineers from its original use in the field of geodetic surveying. A geodetic survey benchmark is a permanent marker set "out in the field" (literally) at known locations during the course of the survey. If you clamber to the top of Mt. Chocorua in New Hampshire, as I sometimes do, when you get to the top you will find a little metal plate giving elevation, longitude and latitude information. This is the benchmark for the mountain's peak. Well, the benchmarks used for computer systems are a little bit less concrete than a metal plate on a mountaintop, but serve the same purpose: They provide a reference point for comparison.

A common benchmark which has been used in the past to evaluate computer systems (and compilers) is the "standard set of programs". In this method of benchmarking a system, the potential user of the system picks a set of "typical" applications programs and has them implemented and measured in operation on several different systems. This is a fairly quantitative and seemingly accurate method which is widely practiced in the information systems

industries. The measurements made for comparison include "through-put" (processing per unit time), high level language efficiency, memory requirements, etc. But this sort of a measure is perhaps a bit too complicated for the home computer context. For one thing, the applications are known only generally. Second, this is the type of study which takes a large amount of time and access to various competitive systems. And, if you read the trade journals, the results are often controversial anyway, since each manufacturer will claim that the benchmarks he provides will prove his machine better than all the rest. Picking the "ideal" small computer system still requires a benchmark, but I suggest it is not a particular program, but a capability.

Capability — the Benchmark of a Small System

We all know that in broad terms, the benchmark computer system, as any computer system, must include several major components: a processor, memory, a mass storage medium, an interactive operator's terminal and systems software. I pick this list in part to illustrate a typical computer configuration and in part to allow programming of a benchmark capability:

A small computer system which meets the benchmark standard will be able to interactively edit a mass storage file of input data with operator commands, producing a second mass storage file as output. This will be achieved in a system costing at most $1000 initially.

The system diagram of the benchmark computer is shown in Fig. 1, as it is implemented in the current state of the art. The

4k to

8k RAM

2-CHAN CASSETTE INTERFACE

EXPANSION

KEYBOARD & DISPLAY

APPLICATIONS SOFTWARE AND DATA

RECORDER

RECORDER

SYSTEMS SOFTWARE

OFF LINE CASSETTE LIBRARY

Fig. 1. The Complete Low Cost Computer System (circa September 1975). This diagram shows the major components of a typical low cost computer system — which should total up under $1000 depending upon manufacturer and details of design. At the time this editorial is written, several kit manufacturers meet this functional benchmark at prices well under $1000. As time goes on the improvements of mass production should drop the average price of such systems.

components of the system are chosen with the editing function in mind, since accomplishing such an edit capability means the machine can be programmed for almost any other personal computing use. Peripherals that enhance the function are of course desirable and will help to personalize your system, but these functions represent the bare minimum without added cost of special purpose peripherals.

The CPU: Which One?

In Hal Chamberlin's article in BYTE #1, the relative merits of three computer designs were covered. In BYTE #3, Dan Fylstra covers a comparison of two additional designs. There is a large variety in the types of CPUs available to home brewers and kit builders — ranging from the 8008, 8080, 6800 and 6501 8-bit micros, to the 16-bit IMP and PACE micros, to commercial 16-bitters such as the LSI-11

and NAKED Milli products and on into the never-never-land of custom designed microcoded MSI computers implemented by individuals (and also soon to be announced in product form by one manufacturer of kits). There is a large element of personal taste involved in the preference of particular instruction sets, and there is also the matter of efficiency for particular classes of programs. Whatever the CPU you use, it is a definite requirement of the system. I guarantee you that any one of the 8-bit or 1 6-bit microprocessors currently being packaged and sold as kits will be adequate to pass this benchmark test, although you may have to write the Editor program yourself.

RAM Memory — How Much?

The CPUs of the conventional microprocessors — kit or home brew implementations — create an output called a "data bus"

Picking your ideal computer system requires a benchmark — which I suggest is not a particular program but a capability.

which is used for exchanging information with everything else in the system. The data bus is the "spinal cord" of the computer's nervous system. This bus concept typically includes 16 bits of buffered address lines and several bus control information lines as well as the 8 or 16 bi-directional buffered data lines. The address space of the typical contemporary microcomputer's architecture is usually 16 bits worth or 65,536 possible memory locations. In the usual system most of these locations will

Continued on page 88

You'll get more than a core.

<

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expandable louse an extendedBASICcompilerand/or the many high-quality, low-cost peripherals on the market today (also available from SPHERE). We provide manuals for maintenance and kit assembly, and even programming concepts for the first-time computer user. Note our special offers on the following pages and send the coupon with your order or request for more information on our parts and kits, along with a complete line of cost-efficient peripherals. We will deliver in 60 days. At SPHERE CORPORATION you'll get a lot more than just a core., intelligent systems.

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first-time computer users. In addition, every SPHERE SYSTEM is expandable as desired. It will run an extended BASIC compiler and/or a most complete line of peripherals. All systems come with complete usage, programming, and application manuals, as well as software supports to make its functions almost limitless. We wanted to make something a lot better; and we did!

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10

REVIEW

What To Do After You Hit Return, or PCC's First Book of Computer Games. Available from People's Computer Company, PO Box 310, Men/o Park CA 94025 ($6.95 plus 504 postage and handling), or from the Hewlett-Packard Corporation, Mail Order Dept, PO Drawer #20, Mountain View CA 94043 ($6.95 plus $1.50 postage and handling).

If you've managed to get BASIC up and running on your Altair or other home brew computer system, why not try it out with a few computer games implemented as BASIC programs? Or if you .ind your minicomputer or time-sharing service have some time to spare . . .

What To Do After You Hit Return is a book of computer games published by the People's Computer Company with the collaboration of Hewlett-Packard Corporation. All of the game programs are written in HP 2000F BASIC, and should be fairly easy to adapt to other implementations of the BASIC

language. The book includes listings of most of the programs, as well as information on how to order machine-readable copies of the programs (on paper tape or magnetic tape) at reasonable prices.

The book is nicely organized into 10 chapters, each dealing with a certain "kind" of game, such as a word game or a hide-and-seek game. The programs range from very elementary number-guessing games to sophisticated business and social science simulations (listings of the larger programs are not included in the book). I was somewhat disappointed to find that a listing of the very popular "Star Trek" game was omitted, although an elaborate "Star Trader" game is included.

The first few pages of the book present, among other things, a rationale for the existence of computer games. While this is probably an effective way to counteract the rigid, efficiency-minded attitudes of some computer professionals, it's really sufficient to say the obvious, "Games are fun". My only reason for hesitation in recommending this book is that I have known some people whose work and play revolve entirely around computers. Therefore I would also like to recommend at the same time: sex, sunshine, salt

water, snow, speed (cars, motorcycles, glide rs, skydiving, whatever you like), yoga and music. The list could be extended indefinitely, of course, and the point is simply to use the whole of your mind and body. Those of us who work and play with computers know that, for exercising one's reason and imagination, we have the greatest tools and toys ever invented. So, having fulfilled my duty to remind you that one can have too much of a good thing, I am pleased to recommend this book, one of several heartening developments that promise to show people what computers are really all about.

-d.h.f.

Microcomputer Design, by Donald P. Martin, Martin Research Ltd., 1825 S. Ha Is ted St., Chicago IL 60608, 1-312-829-6932. $50.

This book is terrific, especially for the following people:

a) Anyone doing original circuit design with microcomputers.

b) Anyone using the 8008 beyond simple applications. The book is virtually an encyclopedia on the 8008. It also mentions 8080 differences, where relevant. There are over 300 well-written pages filled with pertinent technical details.

This book is an excellent reference for the hardware microcomputer designer. Software is not the focal point, although numerous subroutines are fully listed. It is obvious the author has designed, debugged and used everything about which he writes. Whew! After reading this book he has my utmost professional respect. Considering the dollar per hour fees paid for consultants, this book is a bargain.

Format of the book is:

a) description of the basic requirements and minimal circuitry to support an 8008

b) detailed descriptions of special topics, including: I/O port expansions beyond manufacturer's specifications, adding instructions to the 8008, simultaneous input and output with a single instruction, bus structures, RAMs and PROMs, a detailed application of computer controlled programming of the 74S288 which appears adaptable to the popular and low cost 74188A/8223 PROM, a comprehensive solution for priority interrupt hardware, UART interface, keyboard interface, a complete A/D interface design with both single and multichannel, interval timers, digital displays, etc. The last two chapters of the book describe four microcomputer circuits for the 8008: a ninechip microcomputer, a $20 microcomputer, a seven-chip microcomputer, and a 19-chip microcomputer.

Author Martin assumes only that a reader has knowledge of TTL. The book does not repeat information found in Intel manuals. It is well organized and does not try to snow. This book is easily read and well digested, except for the sheer quantity of information.

Martin Research Ltd. sells the book directly at $50 and also is manufacturing a new series of microcomputer hobbyist kits. Judging by the quality of the book they should be excellent and without compromise. A comment in the recent Micro-8 Computer User Group Newsletter appears to bear this up: "It's a neat little machine. . ."

John Gilchrist PO Box 1087 Glen BurneMD 21067

John Gilchrist is an independent consultant with Microprocessors Unlimited: /./Poo.

11

The Ins

And Outs

Of Volatile Memories

Don Lancaster provides us with this discussion of some of the read/write memory techniques which are available to experimenters using readily available parts. In this background tutorial, Don discusses memory techniques from the simple gate flip flop to the bus-oriented RAM system using static memory circuits. For more detailed looks at the designs of circuits using some of the techniques in this article, readers should turn to Don's book, The TTL Cookbook, available from Howard W. Sams, Indianapolis IN. Tlie material in this article is abstracted from Chapter 3 of Don's forthcoming TV Typewriter Cookbook, also to be published by Sams.

Unfortunately, there is no cheap and reasonable memory system available today that will both remember information forever and be able to read and write information rapidly, cheaply, and with reasonable timing signals. This is called the volatility problem.

A memory is non-volatile if it remembers forever. A volatile memory loses its

contents if you remove supply power or fail to observe any timing restrictions it might have.

One older and obvious non-volatile memory system, of course, is magnetic core. The problem with core is that much in the way of support circuitry (including sense amplifiers, write after destructive read circuits, system timing generators, power down interrupts, etc.)

makes core highly impractical for small scale TV typewriter and microcomputer systems.

Sometimes you can gain non-volatility with a volatile memory by some system level tricks, such as a power down technique that holds a low voltage from a battery applied to the memory when the main supply power goes away. Newer CMOS RAM memories consume almost negligible power in the standby mode and lend themselves well to this. You can also transfer data to some non-volatile outside storage such as a cassette recorder or a magnetic disc.

Read-write memory circuits can have their contents changed rapidly at system timing rates. This makes them useful for storing characters, computer programs, update commands, and anything else we want to temporarily store and recover. Most read-write

by

Don Lancaster

Synergetics

memory circuits are volatile, holding their information only as long as supply power remains present and so long as any timing restrictions are not ignored.

Read-write memories for TVT and microcomputer use can range from single bit control and debouncing circuits up through thousand word character stores to 16k and 32 k microcomputer memory stems. Some of the more important memory types include the set-reset flip flop, the word storage latch, the shift register, the Random Access Memory or static RAM, micropower RAMs, and dynamic RAMs. Let's look at these in turn.

Fig. 1. Set-reset flip flops are the simplest type of read-write memory.

4011 CMOS

4001 CMOS

(a) NAND gates

(b) NOR gates.

|00K 401 I CMOS

4050 CMOS

H>

I00K

-OQ

(c) Bounceless push-button.

ONE SIXTH OF CIRCUIT SHOWN

(d) Hex contact conditioning.

12

4013 CMOS

O D Q O

O »C

O O

4027CMOS

O J 0 O

o ► c

O K 0 O

D C 0 0

0 I O I

1 J" I 0

TYPE D FLIP FLOP

J

K

C

o 5

0

0

J

NO CHANGE

0

1

J

0 1

1

.0

J"

1 0

1

1

s

CHANGES

J-K FLIP FLOP

Fig. 2. Clocked flip flops only change in response to a control signal called the "clock".

Fig. 3. Word storage latches provide a handy way to keep track of multiple bits of data.

4013 CMOS

The Set-Reset Flip Flop

One of the simplest read-write storage systems is the set-reset flip flop. It can store only one bit of information, and may be built using the NOR gates of Fig. 1(a) or the NAND gates of Fig. 1(b). When set, the Q output goes and stays in the "1" condition. When reset, the Q output goes and stays in the "0" state. A complementary or Q output is also supplied — it's a "1" when Q is a "0" and vice versa. Simple set-reset flip flops have a hangup in that if you simultaneously try to set and reset them, they go into a disallowed state, and the final way they end up depends on the last input to be released.

Fig. 1 (c) shows us how to use a set-reset flip flop to eliminate the mechanical noise and bouncing of a SPDT push-button or mechanical contact. The first instant the contact makes, the flip flop jumps to the "1" state and stays there till the first instant after the switch is completely released, eliminating any bounce, noise or chatter. Circuits of this type are absolutely essential anytime you want to enter data from a switch or mechanical contact into any digital system. Fig. 1(d)

A major use of set-reset flips flops is to debounce switches.

shows us a simple hex contact conditioner using one CMOS non-inverting buffer.

The Storage Latch

Operation of a set-reset flip flop is nearly instantaneous. If we tried to cascade a bunch of them, we'd get an unchecked wild race, for after changing the first one, the rest may follow domino style. It's much better to have digital circuits change only when you want them to and then do so on a one-stage-at-a-time orderly basis. To do this, we go to a clocked flip flop, such as the type D or JK flip flops of Fig. 2.

With these devices, the D input or the JK inputs set up what the flip flop is to do, but the actual change isn't carried out till a certain edge or level of the clock input happens. With a "D" flip flop we can clock in a "1" or clock in a "0", most often on the positive edge of the clock. We can also divide by two with a D flop by cross coupling the Q output to the D input, making the logic block change states every clocking. With the JK flip flop, we have the options of clocking in a "1", a "0", doing absolutely nothing, or changing each and every state as a binary frequency divider. For convenience in use, most JK and D flip flops also have extra direct set and reset inputs; these operate immediately and are useful for clearing or initializing memory states.

Word Storage

One flip flop can only store one bit at a time. If we use flip flops in groups, we can store a multiple bit word at once. In Fig. 3(a), we use four D flops to store a 4-bit word. Data is entered on the leading (positive) edge of the clock. Figs. 3(b), 3(c) and 3(d) show how we can use larger MSI logic blocks to store words of four, six and eight bits in length.

A word storage latch of this type is often handy to "catch" an input signal on the way by and hold it till you can use it. For instance, a microcomputer may output a word for only a microsecond or two, but your TVT circuit may not get around to using the word for milliseconds or even seconds later. In this case, you catch the microcomputer's output word with a storage latch and then keep it till you are certain you have used it. You then release the latch and ask the microcomputer for a new word through a handshaking signal.

Another important use for word storage is to resynchronize data and make sure it is valid. As an example, suppose your system changes words every microsecond, but that the

One bit of memory is one setreset flip flop.

Dlo—

D 0 C 0

D 0

c 5

D30

D 0

c 5

D4<>

D 0

c 5

»Q3

0Q4

J" STORE

(a) 4-bit word using D-flops.

4042 (CMOS) 4076 (CMOS) 74I74 (TTL)

Dl oD2°D3oD4o

D2 02

D3 03

04 04 CL

T

-OQI

-OQ2

-O04

STORE J

(b) 4-bit word using MSI.

74175 (TTL) 74CI75 (CMOS)

WORD IN

Dl 01 D2 02 03 03 D4 04

05 05

06 06 CL

o

o

i

>

<.

1

WORD OUT

STORE

s

(c) 6-bit word.

4034 (CMOS) 4508 (CMOS)

(d) 8-bit word.

13

previous block that's giving you inputs takes 900 nanoseconds or so to get around to giving you a valid output after Its inputs change. This only gives you 100 nanoseconds or so of valid data and may change with temperature or supply voltage. Add a storage latch and you can catch this output and hold it for the entire next microsecond. The output data will always be one microsecond late, but it will always be valid and always be locked to your system timing. A word storage latch of this type may be needed between the memory and the character generator of a TV typewriter if very long line lengths are in use.

Shift Registers

We can cascade a stack of type D flip flops so that they pass on their contents one stage to the right each clocking. This is called a shift register, and Fig. 4 shows several examples.

In Fig. 4(a), we've built a four stage register out of type D flip flops. Each clocking passes data one stage to the right. In Fig. 4(b), we've added some enter-recirculate logic to let us either send the data round and round or else change selected bits at once. We can make the register any length we like by adding extra internal storage flip flops.

A shift register is the digital equivalent of a "delay line"- your bits go in now and come out later. An "electronic disk memory" is an extremely large memory made out of long shift registers - and is programmed by the computer almost exactly like an old-fashioned fixed head magnetic disk.

In Fig. 4(c), we use a MSI integrated circuit arranged as an 8-bit parallel-in-serial-out shift register. Shift registers are useful to convert dot matrix dots to serial video in a TVT; they are also handy for converting data from parallel to serial form. Fig. 4(d) is the opposite; this is a serial-in-parallel-out shift register useful to convert serial data into parallel form. Finally, Fig. 4(e) shows us a 1024-bit serial-in-serial-out register, useful for storing bulk data. Use several of these side by side if larger words are to be stored. For instance, to store 1024 ASCI I characters, six of these could be used side by side. They can also be cascaded end to end for 1024, 2048, 4096 and more bits per word.

There are lots of long MOS shift registers available. Other popular bit arrangements include the hex 32-bit and hex 40-bit shift registers, the 2518 and 2519. On the surface, shift registers would appear to be ideal for character and program storage in TV typewriter circuits. One of the earliest TVTs (see September 73 Radio Electronics) made extensive use of shift register storage, and similar registers are still used in many premium computer terminals.

Today, we usually have a far better approach to data storage in the static random access memories of the next section. While these long shift registers were the first truly low cost semiconductor storage and are still useful for certain applications, they do have problems and the RAM techniques are often better.

Many of the early shift registers were dynamic devices in which you had to keep the data moving above some critical rate. Most early clocking circuits required a waveform that had to come from a fast, high current, noisy clock driver, swinging 17 volts or more with very strict pulsewidth and spacing

Fig. 4. Some shift register memories. Modern RAM memory devices tend to make shift registers obsolete except for special applications.

40l3(CMOS)

D O C 5

D 0 C 5

D O C

D O C

, DATA 'OUT

r*t__Qj rH1- Q| r*U_Qj r*1 Q

(a) Four stage using type D flip flops.

+ 'RECIRCULATE

OATAINO

SHIFT REGISTER IN OUT

4011 (CMOS)

(b) Recirculate logic.

LOAD/SHIFT „_ CONTROL

SERIAL INPUT O

4021 (CMOS) 74I65(TTL)

abcdefgh

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(c) Parallel in, serial out, 8-bit

PARALLEL PUTS

Pt

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SERIAL „ INPUT u

a b c d e f g IN h CLR

CLEAR _ INPUT °

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(d) Serial in, parallel out, 1024-bit.

CLOCK O

RECIRCULATED

SERIAL INPUTO

2533 (PMOS)

SERIAL OUTPUT

__EXTERNAL_JU_MPER

(e) Serial in, serial out, 1024-bit.

14

Set-reset flip flops are asynchronous—in systems where outputs affect inputs, use of an SR latch can send you off to the races—an uncontrolled oscillation.

restrictions and any pulse overshoot strictly forbidden. Some earlier multiplexed shift registers, particularly the 1402, 1403 and 1404 exhibited selective dropouts called bit pattern sensitivity that would change data if the particular \C didn't happen to like the combination of clocking waveforms, supply voltage, temperature and internal data that it happened to have on hand.

Newer static N channel shift registers have eliminated most of these problems, but they still have one key drawback: This is simply that you can't immediately get at the data you want. The memory must be clocked around once and exactly once to get back any bit. All the other bits are usually between you and the bit you are after. With the RAMs of the next section you can selectively pick off any bit at any time, rather than waiting till it comes around. More importantly, you can be extremely sloppy about your timing and addressing between the times you are actually using the data, and the RAM doesn't care. With a shift register, one missed timing pulse is a disaster. Additional limitations of shift registers as bulk storage devices are that they often cost more at system levels than do RAMs and that they are not directly microprocessor compatible.

A bit is a bit. A word is "n" bits contemplated simultaneously.

Two areas where we can continue to see shift registers as important TVT and microprocessor parts are in First In First Out or FIFO buffer memories such as the Fairchild 3341 (64 x 4) and the 33512 (40 x 9) and similar devices by AMI and Western Digital, and in the newly emerging cha rge coupled device bulk storage systems such as the Fairchild CCD450 (1024 x 9) and CCD460 (128 x 32 x 4) devices. A FIFO gives us a way to interface two systems having different data rates, while the CCD devices promise to eventually provide very low cost and dense bulk storage.

Random Access Memory (RAM)

A random access memory or RAM differs from a shift register in that we can get to any memory location any time we want. If we like, we can address our RAM shift register style, working with the storage cells in sequential order. But we don't have to — we can get at any cell at any time in any order.

To do this, some external binary address lines are routed to internal decoder and selector circuits. When a memory cell is addressed, it is available either for reading as an output or for writing new information into it. Most RAMs tend to be only a single bit wide to save on package pins, but 4- and 8-bit words are sometimes offered.

There are lots of RAMs available. Bipolar types using TTL technology are usually fast and expensive. They generally provide less dense

storage and fewer bits per package. Two examples are the 7489 arranged as 16 words of four bits each and the 74200 arranged as 256 x 1, or 256 words of one bit per word. Both cycle in under 50 nanoseconds.

MOS memories using PMOS, NMOS and CMOS are also widely available. These are often slower and cheaper per bit. They usually offer more bits per package, with up to 4096 bits being common and 16384 just being talked about at this writing. Two early and essentially obsolete examples of MOS memory were the 1101 that was a fully static 256 x 1 device and the 1103 that was a dynamic RAM organized 1024 x 1 that singlehandedly toppled "king core" from the computer world. The early 1101s ran extremely hot with weird supply voltages, while the early 1103s had incredibly complex clocking, refresh, and timing restrictions, besides being bit pattern sensitive.

the best all around choice for TVT character storage and most smaller microcomputer memory tasks as well. The 2102 is arranged as 1024 x 1. It is N channel MOS and works on a single +5 volt supply and is fully compatible with TTL and CMOS logic on all pins. It is fully static, needing no clocks, refresh, charge pumps, memory busy interlocks, sense amplifiers, or similar garbage. Economy versions of the 2102 cycle in one microsecond, while premium jobs are available with 200 nanoseconds or less cycle time. Even the slowest 2102s are usually more than adequate for TVT use, although a bit slow for the newer microprocessors.

Best of all, at this writing, 2102s cost under $5 in singles and as low as $2 in large quantities. While designed by Intel, sources today include just about everybody — Tl, Intersil, AMD, National, Signetics, Fairchild and Synertek.

Fig. 5 shows us the

Fig. 5. The 2102 is the ideal RAM for many TVT and microcomputer

•5V

2102 (NMOS)

I r^

DATA INO

9080

70

60

ADDRESS

SELECT

LINES 50

403o20

WRITE oENABLE o

-ODATA OUT

LOW WRITES; HIGH READS LOW ACTIVATES 1C

After several generations connections to a 2102

of much improved MOS memory. We see a data input

memories, a device called the pin, a data output pin, 10

2102 arrived and dropped address lines, a write line, and

enough in price to often be an enable line. The data in

15

and data out lines are the same sense, meaning that a "1" input is stored as a "1" and appears as a "1" at the output. Our 10 address lines select one of the 1024 storage cells by providing binary addresses ranging from 00000-00000, 00000-00001 ...through 11111-11110 and 11111-11111. We can mix up input address lines any way we want so long as all packages and all input address timing circuits agree on what address combination goes with what storage cell. Jumbling the memory address inputs sometimes helps the circuit layout and makes such things as efficient BCD (Binary Coded Decimal) rather than binary addressing

feasible.

Our chip enable controls whether the memory will do anything. If the chip enable is high, the data out line assumes a floating, high impedance, tri-state mode, and the write input logic is disabled. If the chip enable is low, the IC operates normally. Chip enable should stay grounded except in very special uses. The memory will read if the write input is high and will write if the write input is low.

There is one important timing restriction on the write input — input addresses must be stable when the write input is low. To write into memory, apply input data and an input address. After the inputs are stable, bring the write input low for at least the minimum write time. This time varies from 100 to 700 nanoseconds depending upon the device. Then release the write input, letting it go high before you

-o I OUT

Even the slowest 2101s are usually more than adequate for TVT use — although a bit slow for the newer microprocessors.

2 IN i

3 IN .

5 IN i

6 IN <

-O70UT

8 IN I

-o3 0UT

O4 0UT

■O5 0UT

ONE LOW OF FOUR DECODER

aTs^m^ll

O I 23456789 IO II ADDRESS

WRITE

(a) 1024 memory.

x 8 character store (b) 4096 x 8 microcomputer memory.

created by repeating the same circuit

Fig. 6. Larger 2102 memories are over and over.

change the address inputs or the data inputs. If you try to change addresses during the write process, certain memory locations may get "flashed" by in the address decoding and could lose or alter data. Incidentally this write-only-when-stable rule applies not only to 2102s — it should be observed with practically all RAM circuits. For normal 2102 read operation, make the write input high and the chip enable low.

Fig. 6 shows how we build a 1024 x 8 memory good for TVT character storage. Eight 2102s are simply put on the same PC card with their write, address and enable lines in parallel, the latter usually grounded. All inputs and outputs go to separate pins, and this way we can read or write 8-bit words. In Fig. 6(b), we've combined this circuit four times over to get a 4096 x 8 static memory suitable for a microprocessor main memory and big enough to hold a small compiler for an elementary higher level language. Two new address lines are one-of-four decoded

and routed to the chip selects of each quarter of the memory. One chip select is made low and the other three remain high, and the tri-state outputs are shorted together as shown. A total of 32 ICs is needed.

When building either type of memory card, lots of 0.1 microfarad bypassing capacitors are recommended, along with wide supply and ground runs. PC layout is usually simplest with a double sided board and through-the-pins lead routing. Use plated through boards and keep the through-the-pins routing on the component side if possible.

Reorganized 2102s

Sometimes shorter words of more bits per word may be desirable. For t hese applications, some manufacturers have reworked the 2102 into different organizations including 128 8-bit words and 256 4-bit words. The Motorola and AMI 6810 are typical 128x8 units in a 24-pin package. The Signetics 2606 is a 256 x 4 version in a 16-pin package.

Since there aren't enough pins to go around, the 2606 shares common input and output lines and must be used with a bidirectional data bus system. The Intel 2101 is a 22-pin version of the same thing with separate input and output pins, while the 2111 is an 18-pin memory that needs a bidirectional input/output system. At this writing, costs of these devices are considerably higher than conventional 2102s and are likely to stay that way since they have larger packages and less availability. Nevertheless, they often save you enough packages to be worthwhile in smaller systems. Having only 8 address bits makes the 256 x 4 memories directly compatible with 8-bit microprocessors as well.

Micropower Static RAMs

We can also build CMOS random access memories similar to the 2102. CMOS has one major advantage — its standby power needed when the memory is not cycling is almost zero. This makes CMOS memories ideal for "non-volatile" storage where a small battery can fill in for extremely long term data holding, as well as safely handling routine power outages. CMOS memory cells tend to be physically larger than NMOS ones and more process steps are often involved. So, CM OS memories will probably remain a more expensive route, but a very attractive one where micropower memory is essential. Obvious applications include electronic checkbooks and remote data acquisition systems.

Typical devices are the 64-bit Motorola 4505; 256-bit devices including the RCA 4061, Intersil 6523, and Motorola 4532 (the latter is arranged 64 x 4); 512-bit versions including the Nortec and AMI S2222, and the Intel 5105, arranged as 1024 x 1.

16

Dynamic RAMs

A static RAM takes a full memory cell for data storage. We can get by with nothing but a capacitor as a storage device if we are willing to reshuffle, move around, or refresh the stored data more or less continuously. This is the principle behind the dynamic RAM. In exchange for cheap and dense storage, system level restrictions in the way of memory busy times, refresh cycles, clock lines, and clocking restrictions are needed, often combined with analog output sense amplifiers. Traditionally, any particular size RAM starts out as an impossible to use dynamic device, upgrades itself into a very difficult to use "quasi-static" device, and then gets replaced with a static no-hassle IC the third time around.

Because of this, dynamic RAMs should be avoided entirely for all TVT and microcomputer usage. While there are a wide variety of yet unstandardized 4096 x 1 dynamic RAMs on the market, including the Electronic Arrays 1504, Intel 2107, Standard Microsystems 4412, Tl 4030, Mostek 4096, and the Motorola 6605, they presently cost much more than the equivalent storage using 2102s and are harder to get and harder to use. They do have the potential advantage of reducing package count 4:1 in very large memory systems where the 4096 x 1 format can be used, and are ideal for larger computer memories.

Bus Organization

Any memory system has input data lines, output data lines, and address data lines. It's usually simplest to keep these lines completely separate, for this way there are no timing commands needed to separate input, address and output signals, and no times can occur when one would interfere with the

Traditionally, any particular size RAM starts out as an impossible to use dynamic device, upgrades itself into a difficult to use "quasi-static" device, and then gets replaced with a static no-hassle IC the third time around. Home brew computer people for the most part have to wait for the third stage or have a talent for wrestling with difficult hardware problems. At this writing, Ik memories are in stage 3, 4k memories are in stage 2, and 16k memories are at the beginning of stage 1.

other. This is called an isolated bus or separate I/O system.

Many microcomputers instead use bidirectional data bus arrangements to save on pins and interconnections. The data bus just sits there. If something wants to transmit, its tri-state output is enabled. If something wants to receive, its input is enabled. The signals can go either way on the bus, but system timing has to make certain that only one source is transmitting and only the receivers for that source are responding to the transmitted information.

We can convert an isolated bus system into a

bidirectional bus system using bus transceiver integrated circuits as shown in Fig. 7. Transceivers are built into the 2606 and 2111 (they don't have enough pins to do otherwise), and may be externally added to regular 2102 type memories. In the case of a TV typewriter, it's usually desirable to keep the display and its memory source (either its own or the memory of a microcomputer) connected together; this eliminates dropouts when the bus is going downstream. Thus, the display electronics is best placed between the memory read outputs and the bus transceiver.

Address lines can also share the same data bus as the input and output data lines, but this leads to extremely difficult timing, particularly in 8-bit systems. More often, the address bus will remain separate but will be able to accept address commands from several sources. These sources could include the TV typewriter's live scan timing, a cursor address for update during retrace, and an optional external dominant microcomputer control for rapid and wholesale screen changes.

Fig. 7. Connecting a memory subsystem to a bidirectional input output bus is required in most microcomputer applications.

ADDRESS

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17

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Computers Are RIDICULOUSLY

SIMPLE!

Did you just get hooked? Has the first reaction of bewilderment and perplexity set in as you begin to explore the ins and outs of computing? Nat Wadsworth of SCELBI Computer Consulting - makers of an Intel 8008 based packaged microcomputer system - provides us with this article on fundamentals of computer operation. The article is written with the Intel 8008 in mind as an example of a typical computer, but the principles involved apply to nearly any microcomputer you can find on the market. The material of this article is taken from the first chapter of author Wadsworth's SCELBI-8H/B User's Manual, one of the best documentation support packages among the various kit manufacturers.

by

Nat Wadsworth

SCELBI Computer Consulting Inc. 1322 Rear, Boston Post Road MUford CT 06460

There have been numerous examples put forth over the years to illustrate the basic scheme behind the operation of computers. The scheme is deceptively simple and incredibly powerful. The power comes from the speed with which the machines can perform the simple operations. The fundamental concept of the computer is that it is a machine that is capable of doing two fundamental operations at very high speed: First it is able to obtain a piece of information from a storage area and perform a function as directed by the information it obtains; and secondly, based on its current status, it is able to ascertain where to obtain the next

piece of information that will give it further "directions." This fundamental concept is the key to the operation of all digital computers and while it is a simple concept, it can be built upon to arrive at all the complex operations computers of today can perform. How this is done is what this article is about.

One of the best analogies for describing a computer's basic operations is to consider a bank of boxes, similar to a bank of Post Office mail boxes. A piece of paper containing "directions" can be placed in each box. A person is directed to go to the bank of boxes, and after starting at a given place, to open each box, withdraw the piece of paper and follow the

directions there-on. The boxes are labeled in an orderly fashion, and the person is also told that unless a piece of paper in a box directs otherwise, when the person is finished performing the task directed, they are to replace the paper in the box and proceed to open the next box. Note, however, that a piece of paper may give directions to alter the sequence in which the person is to open boxes.

Fig. 1 shows a picture of a set of such boxes. Each box is labeled for identification.

To present a view of a computer's operation, assume a person has been told to start at box A1 and to follow the directions contained on the pieces of paper in the boxes until a piece of paper containing the direction "stop" is found in one of the boxes. In this example the person finds the following "instructions":

In box A1 is the message: "Take the mathematical value of 1 and write it down on a scratch pad."

Since the "instruction" in box A1 only pertained to some function that the person was to perform, and did not direct the person to go to some specific box, then the person will simply go on to the next box in the row.

20

Box A 2 contains the information:

"Add the number 2 to any value already present on your scratch pad."

The person will at this point perform an addition and have a total "accumulated" value on the pad of scratch paper. The accumulated value would be 3. Since there are no other directions in box A2, the operator would continue on to open box A3 which has the following message:

"Place any accumulated mathematical value you have on your scratch pad into box H8."

Thus the person would tear the current sheet off the "scratch pad" and place it — containing the value "3" — into box H8. Note, though, that while the person was directed to place the accumulated value on the scratch pad into box H8, the person was not directed to alter the sequence in which to obtain new "instructions" so the person would proceed to open box A4 which contains the directive:

"Take the mathematical value of 6 and place it on your scratch pad."

Going on to box A5 the person finds:

"Add 3 to the present value on your scratch pad."

This is obviously just a "data word." The operator adds the value 6 from the previous box to the number 3, noting the calculation on the scratch pad and proceeds to open box A6:

"Place any accumulated value you have on your scratch pad into box H7."

The person thus would put the value "9" on a piece of paper (from the scratch pad) into the designated box and proceed to open box A7:

"Get the value presently stored in box H8 and save the value on your scratch pad."

This is a simple operation and the person proceeds to open up box A8:

"Fetch the value in box H7. Subtract the value of your scratch pad from the value found in box H7. Leave the result on your scratch pad."

When the operator has performed this operation, the operator will have finished the "A" row and will then continue obtaining "instructions" by going to the "B" row and opening box Bl where more directions are found:

"If the present value on your scratch pad is not zero go to box B3."

At this time if the person checks the scratch pad it will be found that the value on the scratch pad is indeed non-zero as the last calculation performed on the scratch pad was to subtract the value in box H8 from the value in box H7. In this example that would be:

9-3 = 6 Therefore the directions in box Bl for this particular case will tell the operator to "jump over" box B2 and go to box B3. For the sake of completeness, however, box B2 does contain an instruction, for had the value on the scratch pad been zero

the operator would not have "jumped over" box B2 and would have found the following message inside box B2:

"The values in box H7 and H8 are of equal value. STOP!"

However, for the values used in this example, the person would have "jumped" to box B3 where the following directive would be found:

"If the present value on your scratch pad is a "negative number" jump to box B5."

Since this is not currently the case the person will not "JUMP" to box B5, but will simply continue to open box B4 which contains:

"The value in box H7 is larger than the value in box H8. STOP!"

At this point the person has completed the "instruction sequence" for this example. It should be noted, however, that box B5 did contain the message:

"The value in box H7 is smaller than the value in box H8. STOP!"

This little example of a person opening up boxes and following the directions

The basic scheme behind the operation of computers is deceptively simple and incredibly powerful.

One of the best analogies for describing a computer's basic operations is to consider a bank of boxes, similar to a bank of Post Office mail boxes ...

A1

A2

A3

A4

A5

A6

A7

A8

B1

B2

B3

B4

B5

B6

B7

B8

C1

C2

C3

C4

C5

C6

C7

C8

D1

D2

D3

D4

D5

D6

D7

D8

E1

E2

E3

E4

E5

E6

E7

E8

F1

F2

F3

F4

F5

F6

F7

F8

G1

G2

G3

G4

G5

G6

G7

G8

HI

H2

H3

H4

H5

H6

H7

H8

Fig. 1. A set of Post Office pigeon holes containing messages.

21

Fig. 2(a). The computer structure compared to the Post Office pigeon holes.

POST OFFICE BOXES

A1

A2

A3

M

AS

A6

A7

A8

B1

B2

B3

B4

BS

B6

B7

B8

CI

C2

C3

C4

C5

C6

C7

C8

Dl

D2

D3

D4

D5

D6

D7

D8

El

E2

E3

E4

E5

E6

E7

E8

Fl

F2

F3

F4

F5

F6

F7

F8

G1

G2

G3

G4

G5

G6

G7

G8

HI

H2

H3

H4

H5

H6

H7

H8

PERSON

CENTRAL PROCESSING

UNIT

PAD & PENCIL

A

ACCUMULATOR

contained in each one is very similar to the concept used by a computer. Note that each "instruction" is very short and specific. Also note that the combination of all the instructions in the example will result in the person being directed to solve the problem:

Is 1 + X greater than, less than, or equal to: 6+ Y? For the reader can note, if the "data words" contained in boxes A2 and A5 for the example were changed, the

sequence of "instructions" would still result in the person being told to "STOP" at the box that contained the correct answer. The reader can verify this by simply assuming that different numbers than those used in the example are in boxes A2 and A5 and going through the instruction sequence until told to "STOP."

The example illustrates how a carefully planned set of directions, arranged such that they are performed in a

precise sequence, can be used to solve a problem even though the "variables" (data) in the problem may vary. Such a set of "instructions" is often termed an "algorithm" by those in the computer field. The example solved a mathematical problem using the "algorithm," but the reader will find that "algorithms" can be devised to solve many problems on a computer that are not strictly mathematical!

Any person learning a new skill must of necessity learn the vocabulary of the field in order to proceed to any great extent. You might think that it would be easier if everything was written in plain everyday words, but the truth of the matter is that specialized vocabularies do serve several useful functions. For one thing, they can greatly shorten the time that it takes to communicate ideas or concepts. In today's fast-moving world, that is of significance in itself. In addition, the limitations of the English language often result in a given word having a special meaning when it is used in the context of a particular subject. One must know the new meaning when it is used in such a manner. Fortunately, much of the computer vocabulary is very logically named. This is probably due partly to the fact that computers are of necessity extremely dependent on logic, and hence many persons who helped create the field — and by that fact were rather logically oriented themselves — seem to have had the logical sense to have named many of the parts and systems of computers and computer programs, in a logical manner.

In the text which follows, two diagrams, Figs. 2(a) and 2(b), are used to demonstrate the analogy between the person taking "instructions"

from a group of mail boxes and the basic operation of a real minicomputer.

Fig. 2(a) shows the Post Office boxes, a figure representation of a person who is able to "fetch" and return the "instructions" or "data" from and to the boxes, and a "scratch pad" on which the person can make temporary calculations when directed to do so.

In Fig. 2(b) are three interconnected boxes which form a "block diagram" of a computer. The uppermost portion of the "block diagram" is labeled the "memory." The middle portion is labeled the "central processor unit" or "CPU" for short. The lower part of the diagram depicts an "accumulator."

The correlation between the two pictures is extremely simple. The "Post Office boxes" correspond to the "memory" portion of a real computer. The "memory" is a storage place, a location where instructions and data can be stored for long lengths of time. The "memory" can be "accessed." "Instructions" and/or "data" can be taken out of memory, operated on, and replaced. New "data" can be put into the "memory." A "memory" that can be "read from" as well as "written into" is called a "read and write memory." A "read and write memory" is often referred to as a "RAM" as an abbreviation. Many times it is feasible to have a "memory" that is only "read from." A memory that is never "written into," but is only used to "read from," is termed a "read only memory" and is abbreviated as a "ROM." For the present discussion the term "memory" will refer to a "read and write memory" ("RAM").

The figure of a person in Fig. 2(a) corresponds to the central processor unit in Fig. 2(b). The central processor

22

unit in a computer is the section that "controls" the overall operation of the machine. The "CPU" can receive (fetch) "instructions" or "data" from the memory. It is able to "interpret" the "instructions" it fetches from the memory. It is also able to perform various types of mathematical operations. It can also "return" information to the memory — for instance make deposits of "data" into the memory. The "CPU" also contains control sections that enable it to sequentially "access" the "next" location in memory when it has finished performing an operation, or, if it is directed to do so, to "access" the memory at a specified location, or to "jump" to a new area in memory from which to continue fetching "instructions."

The pad of paper and pencil in Fig. 2(a) corresponds to the block titled "accumulator' in Fig. 2(b). The "accumulator" is a temporary "register" or "manipulating area" which is used by the CPU when it is performing operations such as adding two numbers. One number or p iece of information can be temporarily held in it while the central processor unit goes on to obtain additional instructions or data from memory. It is an electronic "scratch pad" for the CPU.

The three fundamental units — the memory, central processor unit, and the accumulator — are at the heart of every digital computer system. Of course, there are other parts which will be added in and explained later, but these fundamental portions can be used to explain the basic operation of a digital computer which is the purpose of this article.

The reader should learn the names of the basic parts of the computer as they are presented. Note how easy it is

to remember the portions that have been shown. The "remembering" element is a "memory." The portion that does the "work" or processing is simply termed the "central processor unit," and the part that is used to accumulate information temporarily is aptly called the "accumulator!"

The reader should now have a conceptual view of the concept behind a computer's operation and an understanding of the machine's most basic organization. It is simply a machine that can fetch information from a memory, interpret the information as an instruction or data, perform a very small operation, and continue on to determine the next operation

that is to be performed. Each operation it is capable of doing is very tiny by itself, but when the many operations of a typical "program" are performed in sequence, the solutions to very complex problems can be obtained. It is important to remember that the computer can perform each little operation in just a few millionths of a second! Thus a program that might seem very large to a person — say one with many thousands of individual instructions — would only take a digital computer a few thousandths of a second to perform. The speed with which the computer can execute individual instructions is what gives the computer its seemingly fantastic capability.

Fig. 2(b). Block diagram of a computer's fundamental components.

MEMORY

CENTRAL

PROCESSOR

UNIT

(CPU)

ACCUMULATOR

It is now time to start delving into the actual physical manner in which a computer operates. How can a machine be constructed so that it is able to perform the processes of the central processor unit? While it will require a number of pages of text to explain the procedure, it is not nearly as difficult to understand as many people might suspect. The complexity of a computer when first viewed by a person is caused by the fact that it appears to consist of many hundreds of parts. It becomes much simpler when one understands that the hundreds of parts are really made up from a few dozen similar parts and they are carefully organized into just a few major operating portions. The reader is already familiar with the most fundamental portions.

As fantastic as it may sound at first, a digital computer can be thought of as really nothing more than a highly organized collection of "on or off" switches! Yes, computers are constructed from electronic devices that can only assume one of two possible states! The electronic switches can be constructed in a variety of ways. For instance, the switch can be made so that the voltage at a given point is either high or low, or current through a device is either flowing or not flowing, or flowing in one direction, and then the other direction. But, regardless of how the electronic switch is constructed, its status can always be represented as being either "on" or "off." This "on" or "off" status can be mathematically symbolized most suitably by a mathematical system based on "binary" notation.

Some people tend to think that computers are very difficult to understand because they have heard of ''strange'' types of mathematics that are often

23

As fantastic as it may sound at first, a digital computer can be thought of as really nothing more than a highly organized collection of "on or off" switches!

referred to in conjunction with computers. In actuality much of the mathematics that are dealt with in computer technology are much easier to understand and deal with than the decimal system that the average person is familiar with. In the decimal numbering system a person must learn 10 different symbols, and in order to manipulate those symbols, they must memorize a lot of information. For instance, look at how students are taught to multiply. The learning process actually involves the student having to memorize a rather large number of facts. Because of the way it is typically taught, most students never realize how much work they have to go through just to learn the multiplication tables! The teacher does not stand up and say, "OK, now you are going to memorize about 100 facts." Instead, over a period of a few weeks or so, the student is made to memorize the 100 or so facts — a few at a time. The student must learn the value of each digit multiplied by all the other digits in the decimal numbering system. The decimal numbering system is far more complicated for the beginner than learning the binary numbering system, and the binary numbering

system is the one utilized by computers at their most basic functioning level. The reason the computer uses the binary system is because it is the simplest system around and hence the easiest one with which to construct a computing machine!

Readers know the word "binary" indicates "two." Computers are built up of electronic switches that can only have two possible states. The switches are binary devices. The status of the switches can be represented mathematically utilizing the "binary" numbering system. The binary numbering system only has two digits in it! They are zero (0) and one (1). A switch can thus be mathematically symbolized, for instance, by a zero when it is "off" and a one when it is "on." The opposite relationship could also be established, a one could be used to represent a switch being "off" and a zero used to represent a switch as "on." It would make no difference mathematically which convention was used as long as one was consistent. For the purposes of the present discussion, the reader can assume that the first convention (switch off = 0, switch on = 1) will be used.

It should be immediately apparent that working with a numbering system based on

only two integers will be a lot easier than working with one having 10 integer symbols. In fact, most problems for people learning the binary system come about because they tend to forget how simple it is, and they tend to keep going towards a decimal solution out of habit when they are working with the binary system. For instance, when one starts to add binary numbers, as soon as the value "I" is exceeded, a "carry" to the next column must be made. The value of the addition of "1 + 1" in the binary system is: 10. It is not 2! There is no such integer as "2" in the binary numbering system. However, when a person who has worked with the decimal system for years first starts working with the binary system, old decimal habits tend to get in the way. The reader will have to beware!

To formally introduce the binary mathematical system one can start by stating that it uses two integers, zero (0) and one (1), and no others. A binary number has a value determined by the value of the integers that make up the number, and the position of the digits.

In the decimal numbering system, the reader is familiar with the location of a digit having a "weighted" value as follows: A three digit number has a value determined by the unit value of the digit in the right-most column plus the value of the digit to the left of it multiplied by 10, plus the value of the third digit multiplied by one hundred as illustrated in the following example:

THE DECIMAL NUMBER 345 IS EQUAL TO:

5 UNITS = 5

PLUS(+) 4TIMES 10 = 40

PLUS(+) 3 TIMES 100 = 300

In other words, after the right-most column (which has

the value of the digit), each column to the left is given a weighting factor which increases as a power of the total number of digits utilized by the numbering system. Note that in the above example the 4 representing 40 units is equal to 4 times the number of integer symbols in the decimal system (10) because it is located in the second column from the right. The number 3 representing 300 units is equal to 3 times the number of integer symbols in the decimal system squared because it is located in the third column from the right. This relationship of the weighted value of the digits based on their position can be described in mathematical shorthand as follows:

If the number of different integer symbols in the numbering system is U (for the decimal system U=10)

and the column whose weighted value is to be determined is column number M (starting with the rightmost column and counting to the left)

and any digit is represented by the symbol X

then the weighted value of a digit in column M is expressed as:

X times U raised to the power (M-1) orXU(M-1)

The reader can easily verify that the above formula applies to the decimal numbering system. However, the above formula is a general formula that can be used to determine the weighted positional value of any numbering system. It will be used to determine the weighted positional values of numbers in the binary numbering system.

In the binary numbering system there are just two different integer symbols (0

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and 1). Thus U in the above formula is equal to 2. For illustrative purposes assume the following binary number is to be analyzed:

1 01

and it is desired to determine its value in terms of decimal numbers. (Remember its binary value is just 10 1). Using the above formula for the digit in the right-most column: M is equal to 1, thus (M-1) is equal to 0, and with X = 1:

Weighted Value = X . u(M-1) = 1 . 2° = 1

(Remember that any number raised to the zero power is equal to 1.) Going on to the next digit it can be seen that the weighted value is simply 0! Finally, the digit in the third column from the right has the weighted value because of its position:

Weighted Value = X . u(M"1) = 1.2(3-D = 22 = 4

Then, by adding up the sum of the weighted values (similar to that done for the decimal example earlier) one can see that the decimal equivalent of 1 0 1 binary is 5:

THE BINARY NUMBER 101

IS EQUAL TO:

1 UNITS = 1

+ 0 TIMES 2 = 0

+ 1 TIMES 4 = 4

and thus 1 0 1 in the binary numbering system is the same as 5 in the decimal numbering system.

There will be more to learn about the binary numbering system. However, the brief information given will be enough to continue on with the discussion that this section is primarily concerned

with — the basic operation of a computer. Since the reader is now aware that a computer is composed of numerous electronic switches and knows that one can use a mathematical shorthand to represent the status of the switches (whether they are "on" or "off"), and is also aware of the fundamental concept behind a computer's operation, it is now possible to proceed to show how electronic switches can be arranged to build a functional computer. That is, how the electronic switches can be arranged and interconnected in a fashion that will allow a machine to "fetch" a piece of information from a "memory" section, decode the information so as to determine an "instruction," and also determine where to obtain the next instruction or additional "data."

To begin this part of the discussion it will be beneficial for the reader to picture a group of cells (similar to the Post Office boxes shown earlier) arranged in orderly rows as shown in Fig. 3. This time, instead of each cell holding a complete instruction, it can be understood that each cell

WORD #1 WORD #2 WORD #3 WORD #4 WORD #5 WORD #6 WORD #7 WORD #8

only represents part of an instruction and that it takes a whole row of cells to make up an instruction. Furthermore, each cell may only contain the mathematical symbol for a one (1) or a zero (0) — or, in other words, its contents represent the status of an electronic switch!

At this time a few more computer technology definitions will be illustrated. In Fig. 3, each box containing a binary 1 or 0 represents what is called a "bit" of information. While each cell may only contain one piece of information at a time, a cell can actually represent one of two possible states of information. This is because the cell can be in two possible states — it either contains a zero or a one. If one starts assigning positional values to the cells in a row, it can be seen that the total number of possible states in one row will increase rapidly. For instance, two cells in a row can represent up to four states of information. This is because two cells side-by-side, containing either a 0 or 1 in each cell can have one of the following four states at a particular moment in time: 1

The decimal numbering system is far more complicated for the beginner than learning the binary numbering system, and the binary numbering system is the one utilized by computers at their most basic functioning level.

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Fig. 3. An array of electronic cells, 8 bits per cell.

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The combination of the eight cells can be filled with zeros and ones in 256 different patterns.

0, 0 1, 1 1, or 0 0. Three cells in a row can represent up to eight states of information as the possible states of three cells side-by-side are: 0 0 0, 0

01, 01 0,01 1,1 00,1 01, 1 1 0, 1 1 1. In fact, when each cell can represent a binary number, the total number of states of information that a row of "N" cells can represent is: 2 to the Nth power, 2n. Thus, a row of eight binary cells can represent 2 to the eighth (256) states of information! That is, the combination of the eight cells can be filled with zeros and ones in 256 different patterns!

A group (row) of cells in a computer's memory is often referred to as a "word." A "word" in a computer's memory is a fixed size group of cells that are "accessed" or manipulated during one operational cycle of the central processing unit (CPU). The CPU will effectively handle all the cells in a ''word" in memory simultaneously whenever it processes information in the memory. Digital computers can have varying "word lengths" depending on how they are engineered. Many microcomputers have a memory word size consisting of eight cells. The number of cells in a word, and the number of words in a computer's memory have a lot to do with the machine's overall capability. In the typical microcomputer system, the memory is available in modules — groups of words which can be plugged into a common set of wires in the system. With

current LSI technology, a typical module of moderate price has 1024 bytes in an 8-bit computer system. With the 8008 oriented design serving as the basis for this article, one could potentially plug in 16 such modules for a total of 16,384 bytes or 131,072 bits. Thus, a large amount of information can be "stored" in the computer's memory at any one time.

The astute reader may have already figured out a very special reason for grouping cells into "words" in memory. It was pointed out earlier that a row of eight cells could represent up to 256 different patterns. Now, if each possible pattern could be "decoded" by electronic means so that a particular pattern could specify a precise "instruction" for the central processor unit, then a large group of "instructions" would be available for use by the machine. That is exactly the concept used in a digital computer. Patterns of ones and zeros organized into a computer "word" are stored in memory. The CPU is able to examine a word in memory and decode the pattern contained therein to determine the precise operation that it is to perform. Most microcomputers do not decode every one of the possible 256 patterns that can be held in a row of eight cells as an instruction. They have an "instruction set" of over 100 "instructions" which are represented by different patterns of ones and zeros in an eightcell memory "word." Each pattern that represents

an "instruction" can be decoded by the CPU and will cause the CPU to perform a specific function. Details of all the functions a computer can perform are usually found in the manufacturer's documentation.

There is another ingredient necessary for making the machine "automatic" in operation. That is that the CPU must "know" where to obtain the next "instruction" in memory after it completes an operation. That function is greatly aided by having the memory cells grouped as "words." The reader should note that in Fig. 3 each group of cells representing a word was labeled as: "word #1," "word #2," etc. There is a special portion of the central processor unit that is used to control where the next word containing an instruction in memory is located. This special part is commonly referred to as the "program counter." One reason it was given the name "program counter" is because most of the time all it does is count! It counts memory words! Each word in memory is considered to have an "address." In Fig. 3 each word was given an "address" by simply designating each word with a number. Word #1 has an "address" of 1. Word #2 has an address of 2, etc. The "program counter" portion of the CPU keeps tabs on where the CPU should obtain the next instruction by maintaining an "address" of the word in memory that is to be processed! About 90% of the time all the program counter

does is "increment" the value it has each time the CPU finishes doing an operation. Thus, if the computer were to start executing a simple program that began by its performing the instruction contained in "word #1" in memory — the very process of having the machine start the program at that location in memory would cause the program counter to assume a value of 1. As soon as the CPU had performed the function the "program counter" would increment its value to 2. The CPU would then look at the program counter and see that its next instruction was located in word #2 in memory. When the instruction in word #2 has been processed the "program counter" would increment its value to 3. This process might continue uninterrupted until the CPU found an instruction that told it to "STOP."

A sharp reader might be starting to ask, "Why have a program counter if each instruction follows the next?" The answer is simply that the availability of a "program counter" gives the freedom of not having to always take the instruction at the next "address" in memory. This is because the contents of the "program counter" can be changed when the CPU detects an "instruction" that directs it to do so! This enables the computer to be able to "jump" around to different sections in memory, and as will become apparent later, greatly increases the capability of the machine.

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Fig. 4. The program counter of an 8008 based machine.

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The "program counter" is actually just a group of cells in the CPU that may contain cither a binary zero or one. The binary value in the row of cells that constitute the program counter determines the "address" of a word in memory. Since the number of words in memory can be very large, and since the program counter must be capable of holding the address of any possible location in memory, the number of cells in a row in the program counter is larger than the number of cells in a word in memory. In an 8008 oriented computer design, for example, the number of cells in the program counter is 14. Since 2 to the 14th power is 16,384, the program counter can present up to 16,384 different patterns. Each pattern can be used to represent the "address" of a word in memory. Fig. 4 illustrates what the contents of the program counter would look like when it contained the address for a specific word in memory. The address the example displays is "address 0" which can be considered the first word in memory. The reader should note that an address of zero

can actually represent a word in memory!

Earlier it was stated that some "instructions" can actually change the value of the program counter and thus allow a program to "jump" to different sections in memory. However, the reader now knows that a word in memory only contains eight cells, and yet the program counter of an 8008 based computer contains 14 cells. In order to change the entire contents of the program counter (by bringing in words from memory), it is necessary to use more than one memory word! This can be done if the program counter is considered to actually be two groups of cells connected together. One group contains eight cells, and the other six. In order to change the contents of the entire program counter, one whole eight cell word could be read from a memory location and placed in the right-hand group of eight cells of the program counter. Then another eight cell word could be read from memory. Since only six more cells are needed to finish filling the program counter, the information in two of the eight cells from

the second word brought in from memory could be "discarded." If the information in the two left most cells of the word in memory were thrown away then the remaining six cells would contain information that could be placed in the six unfilled locations in the program counter. Most of the common 8-bit microcomputers use a similar scheme of breaking an address into two pieces when the program counter is loaded in a jump instruction.

In order to make it easier for a person working with the machine to remember "addresses" of words in memory, a concept referred to by computer technologists as "paging" is utilized. "Paging" is the arbitrary assignment of "blocks" of memory words into sections that are referred to figuratively as "pages." The reader should realize that the actual physical memory unit consists of all the words in memory — with each word assigned a numerical address that the machine utilizes. As far as the machine is concerned, the words in memory are assigned consecutive addresses from

There is a special portion of the central processor unit (CPU) that is used to control where the next word containing an instruction in memory is located — the "program counter." Most of the time all it does is count!

word #0 on up to the highest word # contained in the memory. However, people using computers have found it easier to work with addresses by arbitrarily grouping "blocks" of words into pages. For example in the Intel 8008 "pages" are considered to be "blocks" of 256 memory words. The first memory word address in an 8008 system is at address zero (0). Programmers could refer to this word as word #0 on page #0. The 256th word in memory as far as the computer is concerned has an address of 255. (Note: Since the address of 0 is actually assigned for the first physical word in memory, all succeeding words have an address that is one less than the physical quantity!) A programmer could refer to this word as word #255 on page #0. The 257th word in memory has an absolute address of 256 ("n"th word minus one since location 0 contains a memory word) as far as the machine is concerned, but a programmer could refer to that word location as being on page #1 at location 0! Similarly, the 513th word in memory, when the paging concept is used, becomes word #0 on page #2 for a programmer — but it is just 512 as far as the machine is concerned. Paging at multiples of 256 is a convenient tool when dealing with any 8-bit microcomputer.

The reader might have noted a nice coincidence in regards to the assignment of "paging" in 8-bit computers. Each "page" refers to a

27

"block" of memory words that contains 256 locations (0 to 255). The reader will recall that that is exactly the number of different patterns that can be specified by a group of eight binary cells, and there are eight binary cells in a memory "word." The relationship is more than coincidental! Note that now one has devised a convenient way for a person to be able to think of memory addresses and at the same time be able to specify a new address to the program counter that will still result in it containing an "absolute" address that the machine can use. For instance, if it was desired to change the contents of the 14 cell program counter from an absolute address of word #0, say to word #511, the following procedure could be used: The programmer would first specify an instruction that the CPU would decode as meaning "change the value in the program counter." (Such an instruction might be a "jump" instruction in the instruction set.) Following that instruction would be a word that held the desired value of the "low order

Fig. 5. The program counter with address 511 represented in binary notation.

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address" or word # within a "page." Since a memory word only has eight cells, since eight cells can only represent 256 different patterns, and since one of the patterns is equivalent to a value of zero, then the largest number the eight cells can represent is 255. However, this is the largest word #that is contained on a page. This value can be placed in the right-most eight cells of the program counter. Now it is necessary to complete the address by getting the contents of another word from memory. Thus, immediately following the word that contained the "low address" would be another word that contained the "page #" of the address that

the program counter was to contain. In this case the page number would be 1. When this value is placed in the left six cells of the program counter the program counter would contain the pattern in Fig. 5.

If desired, the reader can verify by using the formula presented previously for determining the decimal value of a binary number, that the pattern presented in Fig. 5 corresponds to 511, and thus, by using the "page #" and

"word # on the page," each of which will fit in an eight cell memory word, a method has been demonstrated that will result in the program counter being set to an absolute address for a word in

memory. Fig. 6 provides some examples as a summary.

By now the reader should have a pretty good understanding of the concepts regarding the organization of memory into electrical cells which can be in one of two possible states, the grouping of these cells into "words" which can hold patterns which the CPU can recognize as specifying particular operations, and the operation of a "program counter" which is able to hold the "address" of a word in memory from which the CPU is to obtain an instruction.

It is now time to discuss the operation of the "scratch pad" area for a computer — the accumulator (and some

PAGE#o /\

WORD#0

0 0 0 0

0 0 0 0

ABSOLUTE ADDRESS IN THE PROGRAM COUNTER

1ST PHYSICAL WORD IN MEMORY HAS AN ABSOLUTE ADDRESS OF: 0

Fig. 6. Examples of addresses in an 8008 based system.

PAGE#0

0 0 0

—\ I

0 1111

WORD £255

1 1

ABSOLUTE ADDRESS IN THE PROGRAM COUNTER

PAGE #1

WORD^O

000001 0000000

ABSOLUTE ADDRESS IN THE PROGRAM COUNTER

256th PHYSICAL WORD IN MEMORY HAS AN ABSOLUTE ADDRESS OF: 255

257th PHYSICAL WORD IN MEMORY HAS AN ABSOLUTE ADDRESS OF: 256

PAGE =1

WORD=1

0 0

1 I—

0 1 0

0 0 0

ABSOLUTE ADDRESS IN THE PROGRAM COUNTER

258th PHYSICAL WORD IN MEMORY HAS AN ABSOLUTE ADDRESS OF: 257

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additional "manipulating registers" in the typical 8008 based computer).

As was pointed out earlier, there is a section of a computer that is used to perform calculations in and which can hold information while the CPU is in the process of "fetching" another instruction from the memory. The portion was termed an "accumulator" because it could ''accumulate'' information obtained from the CPU performing a series of instructions until such time as the CPU was directed to transfer the information elsewhere (or discard it). The accumulator is also considered to be the primary "mathematical" center for computer operations for it is the place where additions, subtractions, and various other mathematically oriented operations (such as Boolean algebra) are generally performed under program control.

The concept of an "accumulator" is not difficult to understand and its physical structure can be readily explained. The actual control of an accumulator by the CPU can be quite complex,

page #1

0 0 0 0

but these complex electronic manipulations do not have to be understood by the computer user. It is only necessary to know the "end results" of the various operations that can be performed within an accumulator.

The accumulator in an Intel 8008 based machine can be considered as a group of eight "memory cells" similar to a "word" in memory except that the information in the cells can be manipulated in many ways that are not directly possible in a word in memory.

Fig. 7 shows a collection of eight binary cells containing ones and zeros to represent an accumulator. The cells are numbered from left to right starting with "B7" down to "B0." The designations refer to "bit positions" within the accumulator. Note that the right-most cell is designated B0 and the eighth cell (left-most cell) is designated B7. The reader should become thoroughly familiar with the concept of assigning the reference of "zero" to the right-most bit position in a row of cells (similar to the

WORD#2

-1 i

10 0 0 0 0

0 1

ABSOLUTE ADDRESS IN THE PROGRAM COUNTER

PAGE #1 WORD #255

0

x\ /\

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I 1 0 0 0 1111111

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ABSOLUTE ADDRESS IN THE PROGRAM COUNTER

PAGE #2 WORD ±0

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0010000000

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ABSOLUTE ADDRESS IN THE PROGRAM COUNTER

PAGE =3

Fig. 7. The accumulator, pictured with binary 10101010 (decimal value 1 60) in its 8 bits.

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concept of assigning a reference of zero to the first address of a word on a page in memory) as the convention is frequently used by computer technologists. The convention can be confusing for the beginner who fails to remember that the physical quantity is one more than the reference designation. The convention of labeling the first physical position as zero makes much more sense once the reader learns to think in terms of the binary

The accumulator simply holds a number-it adds and subtracts-and "rotates" its contents.

ABSOLUTE ADDRESS IN THE PROGRAM COUNTER

259th PHYSICAL WORD IN MEMORY HAS AN ABSOLUTE ADDRESS OF: 258

512th PHYSICAL WORD IN MEMORY HAS AN ABSOLUTE ADDRESS OF: 511

513th PHYSICAL WORD IN MEMORY HAS AN ABSOLUTE ADDRESS OF: 512

1024th PHYSICAL WORD IN MEMORY HAS AN ABSOLUTE ADDRESS OF: 1023

numbering system and thoroughly realizes that the "zero" referred to so frequently in computer work when discussing actual operations actually represents a physical state (the status of an electronic switch) and does not necessarily imply the mathematical notion of "nothing." The concept of assigning a bit designation to the positions of the cells within the accumulator will allow the reader to follow explanations of various accumulator operations.

One of the most fundamental and most often used operations of an accumulator is for it to simply hold a number while the CPU obtains a second operator. In an 8008 type of machine the accumulator can be "loaded" with a value obtained from a location in memory or one of the "partial accumulators." It can then hold this value until it is time to perform some other operation with the accumulator. (It will become apparent later that the accumulator of an 8008 can also receive information from external devices.)

Perhaps the second most often used operation of an accumulator is to have it perform mathematical operations such as addition or subtraction with the value it contains at the time the function is performed and the contents of a memory location or one of the "partial accumulators." Thus if the accumulator contained

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Fig. 8. Adding the content of a memory word to the accumulator.

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ORIGINAL CONTENTS OF THE ACCUMULATOR

CONTENTS OF THE SPECIFIED WORD IN MEMORY

FINAL RESULTS AFTER THE ADDITION IN THE ACCUMULATOR

the binary equivalent of the decimal number 5, and an instruction to add the contents of a specific memory location which contained the binary equivalent of the decimal number 3 was encountered, the accumulator would end up with the value of 8 in binary form as shown in Fig. 8.

Perhaps the next most frequently used group of operations for the accumulator is for it to perform ''Boolean" mathematical operations between itself and/or other "partial accumulators" or words in memory. These operations in the typical microcomputer include the logical "and," "or," and "exclusive or" operations.

Another important capability of the accumulator is its ability to "rotate" its contents. In an 8008, as in many micros, the contents of the accumulator can be rotated either to the right or left. This capability has many useful functions, and is one method by which mathematical multiplication or division can be performed. Fig. 9 illustrates the concept of "rotating" the contents of the accumulator.

The astute reader may notice that the accumulator rotate capability also enables the accumulator to emulate a "shift register" which can be a valuable function in many practical applications of the computer.

The accumulator serves another extremely powerful function. When certain operations are performed with the accumulator the computer is capable of examining the results and will then "set" or "clear" a special group of "flags." Other instructions can then test the status of the special "flags'' and perform operations based on the particular setting(s) of the "flags." In this manner the machine is capable of "modifying" its behavior when it performs operations depending on the results it obtains at the time the operation is performed!

In an 8008 based computer, there are four special flags which are manipulated by the results of operations with the accumulator (and in several special cases by operations with "partial accumulators"). These four flags are described in detail below. Other micros have similar condition flags.

The "carry flag" can be considered as a one bit (cell) extension of the accumulator register. This flag is changed if the contents of the accumulator should ''overflow" during an addition operation (or ''underflow" during a subtraction operation). Also, the "carry bit" can be utilized as an extension of the accumulator for certain types of "rotate" commands.

The "sign flag" is set to a logic state of "1" when the most significant bit (MSB) of the accumulator (or partial accumulator) is a "1" after certain types of instructions have been performed. The name of this flag derives from the concept of using two's complement arithmetic in a register where the MSB is used to designate the sign of the number in the remaining bit positions of the register — conventionally, a "1 " in the MSB designates the number as a "negative" number. If the MSB of the accumulator (or partial accumulator) is "0" after certain operations, then the "sign flag" is zero (indicating that the number in the register is a positive number by two's complement convention).

The "zero flag" is set to a

logic state of "1" if all the bits in the accumulator (or partial accumulator) are set to zero after certain types of operations have been executed. It is set to "0" if any one of the bits is a logic one after these same operations. Thus the "zero flag" can be utilized to determine when the value in a particular register is zero.

The "parity flag" is set to a "1" after certain types of operations with the accumulator (or partial accumulators) when the number of bits in the register that are a logic one is an even value (without regard to the positions of the bits). The "parity flag" is set to "0" after these same operations if the number of bits in the register that are a logic one is an odd value (1, 3, 5 or 7). The "parity flag" can be especially valuable when data from external devices is being received by the computer to test for certain types of "transmission errors" on the information being received.

In its simplest form, a group of switches can be used as an input device and a group of lamps as an output device!

In addition to the full accumulator previously discussed there are six other 8 bit registers in the Intel 8008 computer referred to as "partial accumulators" because they are capable of performing two special functions normally associated with an accumulator (in addition to simply serving as temporary storage registers). The full accumulator will often be abbreviated in this manual as "ACC" or "register A." The six "partial accumulators" will be referred to as "registers B, C, D, E, Hand L"

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Registers B, C, D, E, H and L of an 8008 are all capable, upon being directed to do so by a specific instruction, of either incrementing or decrementing their contents by one. This capability allows them to be used as "counters" and "pointers" wh ic h are often of tremendous value in computer programs. What makes them especially valuable in 8008 architecture is that when their contents are incremented or decremented the immediate results of that register will affect the status of the "zero," "sign," and "parity" flags discussed above. Thus it is possible for the particular contents of these registers to affect the operation of the computer during the course of a programs operation and they can be used to "guide" or modify a sequence of operations based on conditions found at the actual time a program is executed.

It should be noted that registers B, C, D, E, H and L are capable of being incremented and decremented — but the full accumulator — register A — cannot perform those two functions in the same manner. (The full accumulator can be incremented or decremented by any value by simply adding or subtracting the desired value. There is not, however, a simple increment or decrement by one instruction for use with the full accumulator of an 8008!) Two of the partial accumulators, registers H and L, serve an additional purpose

Fig. 9. Rotating the content of the accumulator.

B7 B6 B5 B4 B3 B2 B1 BO

0

0

0

0

0

0

1

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

ORIGINAL CONTENTS OF THE ACCUMULATOR(EQUAL TO DECIMAL 2)

RESULT WHEN THE ACCUMULATOR IS ROTATED TO THE LEFT ONE TIME (VALUE NOW EQUAL 4)

RESULT WHEN THE ACCUMULATOR IS NOW ROTATED TO THE RIGHT TWO TIMES (VALUE NOW EQUAL 1)

NOTE THAT IF A ROTATE RIGHT COMMAND IS DONE AGAIN THAT THE "1" IN POSITION B 0 WILL APPEAR ATB7!!

AND THAT NOW A ROTATE LEFT COMMAND WOULD RESTORE THE "1" IN POSITION B 7 BACK TO B 0 !

in the 8008 computer CPU. These two registers can be used to directly "point" to a specific word in memory so that the computer may obtain or deposit information in a different part of memory than that in which a program is actually being executed. The reader should recall that a special part of the central processor unit (CPU) termed the program counter is used to tell the computer where to

It has been said that the computer is the most versatile machine in existence and that its applications are limited only by man's ability to develop programs that direct the operation of the machine.

obtain the next instruction while executing a program. The program counter was effectively a "double word length" register that could hold the value of any possible address in memory. The program counter is always used to tell the machine where to obtain the next instruction. However, it is often desirable to have the machine obtain some information — such as a "data word" — from a location in memory that is not connected with where the next instruction to be performed is located. This can be accomplished by simply loading "register H" with the "high address" (page) portion of an address in memory, then loading

"register L" with the "low address" portion of an address in memory, and then utilizing one of a class of commands that will direct the CPU to fetch information from- or deposit information into the location in memory that is specified ("pointed to") by the "H" and "L" register contents. This information flow can be from/to the location specified in memory and any of the CPU registers.

At this time it would be beneficial for the reader to study Fig. 10. Fig. 10 is an expanded block diagram of Fig. 2(b) and shows the units of the computer which have been presented in the previous several pages.

Until now no mention has

31

The computer's great versatility comes about because the machine is capable of executing a large group of instructions in an essentially limitless series of combinations.

been made of how information is put into or received from a computer. Naturally, this is a very vital part of a computer because the machine would be rather useless if people could not put information into the machine upon which calculations or processing could be done, and receive information back from the machine when the operations(s) had been performed!

Communications between the computer and external devices — whether those devices be simple switches, or

transducers, or teletype machines, or cathode-raytube display units, or keyboards, or "mag-tape" and "disk" systems — or whatever, are commonly referred to as input/output operations and are collectively referred to in abbreviated form as "I/O" transfers.

In the Intel 8008 computer designs all "I/O" transfers are typically made between external "I/O ports" (which connect to external devices via appropriate electronic connections) and the full accumulator in the

Fig. 10. The block diagram of Fig. 2(b) filled in with the designations for an Intel 8008 computer.

MEMORY 0 10 0 0 10 0

00000000

0 0 0 0 0 0 0 1

110 0 0 111

0 0 1 10 0 0 1

111110 0 0

11111111

WORD #1 AT PAGE 0 LOC 0 WORD #2 AT PAGE 0 LOCI WORD #3 AT PAGE 0 LOC 2

WORD #X AT PAGE Y LOC Z

PROGRAM COUNTER

CENTRAL

PROCESSOR

UNIT

FLAGS. "C,""Z,""S," &"P"

AN 8008

CPU WITH

PROGRAM COUNTER

AND REGISTER STATUS FLAGS

REGISTER "A"

REGISTER "B"

REGISTER "C"

REGISTER "D"

REGISTER "E" REG "H" & MEMORY PAGE POINTER REG "L" & LOW ADDRESS POINTER

: FULL ACCUMULATOR ' PARTIAL ACCUMULATOR : PARTIAL ACCUMULATOR

■ PARTIAL ACCUMULATOR ■■ PARTIAL ACCUMULATOR

■ PARTIAL ACCUMULATOR < PARTIAL ACCUMULATOR

computer. This 1/0 structure means that a whole group of devices can be simultaneously hooked up to the computer and the computer used to receive information from or transmit information to a variety of devices as directed by a "program." A special set of commands is used to instruct the computer as to which "1/0 port" is to be operated at any particular instant. With appropriate programming it is then possible to have the computer "communicate" with a large variety of devices in an essentially "automatic" mode — for instance receiving information from a digital multimeter at specified times, then possibly performing some averaging calculations, and then outputting results to a teletype machine without human intervention. Or, in other appl ications — information from a human operator can be typed into the machine using a typewriter-like keyboard. In its simplest form, a group of switches can be used as an input device and a group of lamps used as an output device for the computer!

However, a more sophisticated system used in many applications would be to use a teletype machine or a combination of a keyboard and a cathode-ray-tube (CRT) display attached to input and output ports to serve as the primary means of 1/0. A person can thus type information on the keyboard which will pass it into the computer, and the computer can display the results of its operations on the CRT display (which can, incidentally, be made from an ordinary oscilloscope and a special CRT interface unit such as that described in Jim Hogenson's article in BYTE #2).

Perhaps the most wonderful and exciting aspect about a digital computer is its tremendous versatility. It has been said that the computer

is the most versatile machine in existence and that its applications are limited only by man's ability to develop programs that direct the operation of the machine. It is undoubtedly one of the best machines for allowing man to exercise and test his creative powers through the development of programs that direct the machine to perform complex operations that can not only control other machines, or perform calculations many times faster than humanly possible, but because it can be used to "simulate" or "model" other systems that it might be impractical to build for purely experimental purposes. Thus man can create a "model" in a computer program and actually "play" with the synthetic model without actually building the physical device!

The computer's great versatility comes about because the machine is capable of executing a large group of instructions in an essentially limitless series of combinations — these series of instructions are stored in the memory bank(s) of the computer — and a new series of instructions can be placed in the memory bank(s) whenever desired. In fact, the memory bank(s) can often hold several completely unrelated "programs" in different sections and thus one can have a machine that performs totally unrelated tasks simply by pushing a few buttons and thereby directing the machine to start executing a new program in a different section of memory!

The digital computer is capable of providing services to people from all walks of life! A person need only choose (or develop) programs and connect external instruments that will provide the capabilities desired.

For instance, a scientist might put a mathematical calculator program into the

32

computer's memory and use the computer as a sophisticated electronic calculator by using a calculator-type keyboard as an input device and a CRT display as an output device on which to receive the answers to complex mathematical calculations which the computer performs. After using the computer as a calculator for a period of time, the scientist might decide to utilize the same computer to automatically record data from instruments during an experiment. By simply putting a different program in the computer's memory and plugging some peripheral measuring instruments into the computer's I/O ports, the scientist could have the computer periodically make measurements while he went out to lunch and save the results in its memory. After lunch the scientist could have the computer tabulate and present the data obtained from the experiment in compact form. Then, by merely putting a different program in the memory, the scientist could have the computer help him set up and arrange a "reference file" all sorted into alphabetical order or any manner that would enable him to use the computer to extract information far faster than a manually operated "paper file card" system.

So the computer can be a valuable tool for a scientist; but, the same machine with a different program in its memory (and possibly different peripheral devices) could be used to control a complex manufacturing operation such as a plastic injection molding machine. In such a case I/O units that coupled to transducers on the injection molding machine might be used to relay information to the computer on a variety of parameters such as temperature of the

The development of computer programs can be an extremely creative, exciting and personally rewarding pastime and offers essentially limitless ways to exercise one's creative capabilities....

plastic in the feed barrel, amount of feed material in the hopper and injection barrel, available pressure to the mold jaws and feed barrel, vacancy or filled status of the mold and other useful parameters. The computer could be programmed to analyze this information and send back signals to control the operation of heaters, pressure valves, the feed rate of raw materials, when to inject plastic into the mold, when to empty the mold, and other operations to enable the plastic injection system to operate in an essentially automatic mode.

Or, a businessman could use the same computer connected to an electric typewriter, with a suitable program in memory, to compose, edit and then type out "personalized form letters" by directing the computer to insert paragraphs from a "bank of standard paragraphs" so as to form a personalized customer answering system that would handle routine inquiries in a fraction of the time (and cost) that it would take a secretary to prepare such letters. Or, the businessman might utilize the computer to help him control his inventory, or speed up his accounting operations.

However, a computer that costs as little as the typical micro system does not have to be restricted to a business or scientific environment. The computer that can do all the types of tasks mentioned above can also be used to have fun with, or to perform valuable services, to private individuals.

The computer can be used as a sophisticated electronic

calculator by almost anyone. It can be used to compose letters (using an editor program) by virtually anyone. Programs that sort data alphabetically or in various other categories can be of valuable service to people in many applications. The computer can be used to monitor and control many household items, serve as a security monitoring system, be connected to devices that will dial telephones, and do thousands of other tasks.

The electronic hobbyist can be kept occupied for years with a digital computer. For instance, one can build a little test instrument that plugs into a few I/O ports on the computer, then load programs into memory that will direct the computer to automatically test electronic components (such as complex TTL integrated circuits) in a fraction of a second! (Businesses can do this too!)

Or a ham radio operator can put a program into memory that will enable the computer to receive messages typed in from a keyboard, convert the messages to Morse code, and then actuate an oscillator via an output port to send perfectly timed Morse code. In addition, the ham radio operator might use the computer with an appropriate program to serve as a "contest logging aid."

The "logging aid" would serve as an instant reference file whereby the operator could enter the calls of stations as they were worked and have the computer verify if the contact was a duplicate. The computer could do other tasks too, such as record the time of the contact by checking an external digital clock (or by utilizing a program that would enable the computer to be used as a clock within itself)!

And, the computer can be used to play numerous games with, such as tic-tac-toe, checkers, word games, card games, and a large variety of other types of games that one can program a computer to perform.

And perhaps most important — for the student, hobbyist, scientist, businessman, or anyone interested in the exciting possibilities of its applications — the contemporary microcomputer offers unlimited possibilities for the expression of individual creativity. For the development of computer programs can be an extremely creative, exciting and personally rewarding pastime and offers essentially limitless ways to exercise one's creative capabilities in developing "algorithms" that will enable the machine to perform desired tasks!

The electronic hobbyist can be kept occupied for years with a digital computer.

33

If I UUnlit In I t li L u I lU in learning about microcomputers and microcomputer programming, Scelbi Computer Consulting, Inc., has some fine publications that can give you a real education.

The ScelbiSB User's Manual

is a fine introductory publication that starts by assuming that the reader has never used a computer. It explains how a microcomputer is fundamentally organized and it's basic principles of operation. It then provides a comprehensive explanation of the entire instruction set used in the Scelbi-8B microcomputer. Next, there is a highly detailed section that explains how to operate a Scelbi-8B and provides several sample machine language programs. Another section illustrates how easy it is to connect external devices to the computer. Finally, for those interested in the technical aspects, there is a large chapter devoted to technical information — including schematics, assembly drawings and parts lists for the Scelbi-8B. (Some might actually construct a microcomputer from the information available in this manual alone!) Price? Just $14.95.

Machine Language Programming For The "8 0 08" (and similar microcomputers)

This manual was written to provide the reader with the detailed knowledge one needs to know in order to successfully develop machine language programs. This information packed publication discusses and provides numerous examples of algorithms and routines that can be immediately applied to practical problems. Coverage includes:

* Detailed Presentation of the "8008" instruction set *Debugging Tips

*Flow Charting *Organizing Tables

*Mapping 'Maximizing Memory Utilization

'Fundamental Programming Techniques: Loops, Counters, Pointers, Masks *l/0 Programming, Real-time Programming

'Multiple-precision arithmetic 'Programming for "PROMS"

'Floating-point package 'Search and Sort Routines

'Editing and Assembling

Mathematical Operations ^Creative Programming Concepts

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Assembler Programs For The "8 0 0 8"

Discusses a "minimum length" assembler program that can reside in 2k of memory, plus a more sophisticated version for those who have additional memory and desire a more powerful version. Included in this manual is a thorough explanation of the fundamental concepts of an assembler's operation, details on how to format the "source listing," step-by-step analysis and presentation of subroutines, program flow charts, and assembled listings of the programs! Price? A very reasonable $17.95.

An "8 0 0 8" Editor Program

Describes variations of an "Editor" program that can reside in 2k of memory. Additional memory may be used to increase the size of the text buffer. The program enables one to manipulate "text" in order to create "source listings" or perform other kinds of text preparation. Includes discussion of routines, flow charts, and assembled listing. Priced at just $14.95. Prices given are for domestic delivery at book mailing rate. Add $2.50 for each publication if PRIORITY air service desired (U.S.) Overseas — include $6.00 for each publication for airmail service.

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34

WHAT SINGLE ELECTRONIC MACHINE CAN BE USED TO PERFORM/CONTROL ALL THE FOLLOWING TYPES OF SERVICES?

Send morse code Control repeater stations Operate as a calculator

Receive/send/buffer data between a wide variety of communication devices Monitor instruments Control machines Sort/compile data Test other devices

Play games

the SCELBI-8B MINI-COMPUTER CAN !

SCELBI COMPUTER CONSULTING, INC.- The company that pioneered in producing the small computer for the individual user with the popular SCELBI—8H, now brings you the new SCELBI—8B with increased capability!

Like the former SCELBI-8H, the SCELBI-8B is built around the amazing '8 0 0 8' "CPU-on-a-Chip" which has been revolutionizing the electronics world.

However, the NEW SCELBI—8B offers extended memory capability at reduced cost! It is directly expandable to 16,384 words of RAM/ROM/PROM memory. This increased memory capability now means the user has the potential in a small and compact computer to support compiler type languages, manipulate sizable data bases for business and scientific applications, and support a wide variety of programs including those that take advantage of external mass memory storage devices.

The NEW SCELBI—8B still retains the outstanding features of its predecessor. Decoding logic for 8 Output and 6 Input Ports is built into the basic computer. Plug-in capability for I/O devices is provided on the chassis. A unique, simple to operate console that utilizes just 11 switches on the front panel makes the SCELBI—8B a pleasure to use.

The NEW SCELBI— 8B is backed by a line of low cost SCELBI interfaces which currently include: an interface that turns an oscilloscope into an alphanumeric display system, low cost keyboard and TTY interfaces, and an interface that turns a low cost audio tape cassette into a "Mag-Tape" storage and retrieval unit.

Last, but certainly not least, SCELBI has a wide selection of software ready to run on the NEW SCELBI—8B including: Editors, Assemblers, calculating programs, I/O and general utility routines. Additionally, SCELBI produces publications that can show you how to develop your own custom tailored programs.

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35

HEXPAWN

A Beginning Project

in ARTIFICIAL Intelligence

What is intelligence? Pushing aside the philosophical and psychological questions for the moment, I can offer an operational definition of intelligence in programs: An "intelligent" program is one which was designed with a range of possible circumstances in mind, rules defining successful and unsuccessful responses to such circumstances, memory of the history of past responses and relevant circumstances, and an algorithm for using such past history information when similar circumstances occur again. Robert Wier has provided an example of a simple game application which illustrates this definition of intelligence in programs. Does it sound too deterministic for you? Hardly - the response is in some sense inherent in the program and its context. But, just as in natural life, the order and degree of the various inputs to the AI program cannot be predicted in advance with any great certainty. Just as each individual person is unique, each individual run of a good AI program will tend to differ - AI programs, like people, are good for lots of surprises.

by

Robert R. Wier 1208 Mistletoe Drive Fort Worth TX 76110

Artificial intelligence. The very words themselves are at once frightening and fascinating. Hal lip reading; Colossus communicating with Guardian in a real "machine language"; M5 taking over the Enterprise. Yet these are still media creations, and we are cushioned by the comforting buffer of a movie or TV screen. To realize what artificial intelligence (or AI) is really like, you have to create it yourself (ever have an urge to play Frankenstein?). HEXPAWN originally appeared in Scientific American (Vol. 206, No. 3, p. 138) in Martin Gardner's "Mathematical Games" column. It is simplicity itself. The game board is identical to that of the standard two-dimensional tic-tac-toe, and two players control three pieces (or Xs or 0s or whatever) each. Each player's objective is to advance his pieces to the opposite side of the board, or eliminate or block the opposition's pieces. Moves of each piece are the same as the pawn in chess (i.e., move 1 forward to a vacant square, take diagonally).

HEXPAWN rules are very simple: To win, attempt to move one of your pieces to the opponent's side of the board, or block him from making any move. Moves are those of the pawn in chess. That is, you may move one square forward to an unoccupied square, or you may move one square diagonally in order to "take" an opponent's piece. Only these two moves are allowed. You may not move diagonally without a "take"; you may not move forward with a "take". Fig. 1 illustrates a typical game situation of occupied and unoccupied squares. In this "model" of the layout, the computer(X) can move in two ways which "take" the human pawn in the central square (number 4). The computer can move in one way which will not "take" a human pawn.

For a complete explanation, please refer to the original article (every library should carry Scientific American, and if yours doesn't, ask them why).

This version of HEXPAWN is a game that learns. You

36

may play it several times beating the computer (which keeps track of the board, as well as acting as one of the players) with ridiculously simple strategies. However, as play progresses, the computer notes its mistakes, and eventually, after 8 to 10 games, you may only tie or lose to the computer. The machine has "learned" how to play the game successfully.

The method described here to implement HEXPAWN is strictly brute force, and many techniques may be used to improve both the execution time and storage efficiencies. But in order to fully appreciate the internal workings of HEXPAWN, it is nice to keep it simple. Also, since this is a self-modifying program (a necessity in almost all Al), programmers will recognize that "simple is good," since after the code runs wild a few times and produces strange and wonderful results, it is fortunate to have code which is easy to debug.

HEXPAWN was implemented by the author on a 16-bit/word mini with an assembler. In this version it occupies 88E hex bytes, or 2190 decimal bytes, or 4218 octal bytes. It would be possible to reduce the memory requirement by using two or three bits instead of two bytes for the board representation of the playing pieces, but this would require a lot of bit diddling that is tedious unless you are really tight on memory. The minimum representation of the three states requires a two-bit binary number, using three of the four possible states of two bits. This requires only one word of memory. A less compact but easier to program bit level representation is to use three bits, one for each state. Only one bit would be "on" at any given time if the corresponding state is present. But on many computers it's considerably

simpler to use two bytes so that pieces may be represented by "X", "0", and " " (space). The storage requirement will also vary considerably with the nature of the peripherals used, due to whatever interface programming is necessary. The original was implemented with a CRT where the cursor was ''locked'' in synchronization with a programmed counter notifying the program of the board location of the square being referenced.

Basically, the structure of the implementation is quite simple. In the Scientific American article, all possible board configurations are presented. Note that some are mirror images of others, but these are still required. These board configurations are hereafter referred to as "models". The program attempts to match the current board configuration with the models stored in memory. When a model is found, several courses of action may be available. In some cases, only one move will be possible, thus the computer is limited to that move. In other cases several moves are possible. The computer will select one (whichever is first on the list) and make the move. If a model is not found, this is an error situation; an illegal move has been made on your part, and an error message should be output. Fig. 2 is a "macro" flowchart of this process.

Following each model in memory is a string of move index bytes followed by a hex "FF". The "FF" is used as a terminator for that particular model. The bytes between the model and the "F" are index numbers for possible moves — the index references a jump table to produce a correct move by executing a jump.

A jump table is a very handy device when you need to reference several different

0

X

1

2

X

- I

O"

O

' I ■

*

6

O'

8

Fig. 1. The game layout for a typical move.

( START \—

INITIALIZE MOVE INDICES

INITIALIZE OTHER AS REQUIRED

SEARCH FOR MODEL MATCHING CURRENT BOARD

NULL ADDRESS

OF INDEX

STORED OF

PREVIOUS MOVE

EXECUTE MOVE ENDNOTE ADDRES OF MOVE'S INDEX

' GAME CONCEDED

HUMAN WIN51

COMPUTER WINS'

( STOP 1

Note that the move indices are initialized only once for each series of games. Initialization for each game will defeat the learning process.

Fig. 2. Control flow logic for the HEXPAWN program.

37

Fig. 3. Table of All Possible Moves (Models).

BOARD POSITION MODEL

COMPUTER'S

SQUARE

POSSIBLE MOVES

0

1

2

3

4

5

6

7

8

(see Fig.4)

X

X

X

0

0

0

3,4,7

X

X

X

0

0

0

1,4, 5

X

X

X

0

0

0

1,2

X

X

X

0

0

2,6,8

EXAMPLE

OF FIG.? X

X

X X

0 0

X 0

0

0

3,7,11 2,6,7

X

X

0

0

0

3,4,5

X

X

X

0

0

5, 10, 11

X

X

X

0

0

0

5,6

X

X

X

0

0

8,9

X

X

0

0

X

0

2,3

X

X

0

0

0

3,4,5

X

X

0

0

6,7

X

X

0

0

6,7

X

X

0

0

7

X

X

X

0

8, 11

X

0

0

0

2

X

X

0

0

8,5

X

0

0

X

3, 14

X

X

X

0

8,11

X

X

0

0

0

15

X

0

X

0

15

X

0

X

X

11, 14

X

X

0

6,7,8

X

0

X

3, 11

X

X

0

5, 11

X

X X

0

0

X

2,8 6, 14

X

0

0

2

X

X

X

0 0

0

0

1,2,6 15

X

X

0

X

0

0

15

X

0

0

0

6

Key: X = computer piece occupies square

0 = human's piece occupies square blank = square is empty

locations in your program using numerically sequential indices. The advantage is that after assembly, debugging is facilitated. If you desire to change all the jump addresses of a particular segment of code, you need only change the jump table, rather than each reference containing the desired jump address. It is also unnecessary to worry about having to make the code referenced in the jump table equal in length. All that is taken care of in the jump table itself in an easy and

consistent manner. The jump table is particularly appealing in that you have multiplelevel-indirect addressing capability.

HEXPAWN learns by removing the index which leads to a defeat for the computer. Thus, if a move to square 8 results in a loss, the index fo Mowing the appropriate model is changed to a null character, which eliminates the losing move. It is easily seen that if a particular move always leads to a loss, it will be completely

nulled, thus allowing the computer to "know" several moves ahead that it has lost the game. As each losing move's index is nulled, the learning process effectively progresses toward earlier moves.

As noted in the original article, this version only penalizes the losing move. Also of possible consideration is the rewarding of a winning move, but this would complicate our code considerably.

For convenience's sake let us number the squares of the playing board 0-8 starting in the upper left corner, working horizontally and down. Let us also establish the convention that the human player always moves first. This does not seem to compel a deterministic game. That is, either player may win regardless of who moves first. Now suppose that there has occurred a particular board configuration (Fig. 2). Note that the "X" pieces belong to the computer, while the "0" pieces are yours. You have just made the preceding move, and now the computer must decide what to do. The computer's possible moves are indicated by the dotted lines. But how does the computer know this? It searches through memory until the following bit pattern is found (in hex):

E740E7D6D64040D640020607F

The first 9 bytes represent the board. Note that in EBCDIC, E7 is an "X", D6 is an "0", and 40 is an " ". Remember that these are EBCDIC codes (my peripherals use it), but it could just as easily have been ASCII. The next three bytes represent the indices for possible moves as they exist at the beginning of the game. That is, the possible moves are these:

02: "X" in square 0 moves to square 4 taking your "0"

"To realize what artificial intelligence is really like, you have to create it yourself..."

06: "X" in square 2 moves to square 4 taking your "0"

07: "X" in square 2 moves to square 5

Now, either move 02 or move 07 will result in a loss the next move that "0" makes (assuming that you are trying to win) and that index will be nulled so it cannot be selected again in the event of this same board configuration. Move 06 is correct since it removes your piece and also blocks you from obtaining "X's" side of the board. Since the computer simply selects the first move on its list, the first time this board configuration is encountered, the computer will lose (as a result of move 02). However, after this game the computer will select move 06, which is correct, since it is next on the list. The number of the index has no particular significance; it could be anything as long as it denotes the displacement needed in the jump table to direct the flow of control to p the proper code for the move desired. The "F" is a terminator that signals the end of that particular model and move list.

We will not present the actual code to accomplish the HEXPAWN algorithm since there are so many machines of a differing nature in hobby use. However, copies of the author's LOCKHEED SUE Minicomputer version are available from him for $3 to cover the most of duplication and postage.

A few hints are in order to help you avoid some of the more obvious problems. The

38

EXAMPLE 1: To illustrate, assume that the following is in memory at the start: Location (hex) Contents (hex) Comments

Step 1.

56

HS'—

■Step 6.

58

06

If loss store

move indices after appropriate

5A

07

"00" here.

model

5C

FF

— AO

XX

beginning of jump table

Step 2. .

/A2

XX

z.

-«D2

A6

XX

A8

XX

AA

XX

AC

E4

Step 4.

address of move 06

AE

EA

address of move 07

D2

XX

code for move 02

The "learning" sequence is composed of the following steps:

1. Search models until match is found.

2. Select first index of possible moves, add to location of beginning of jump table, giving location of address of that move's code - in this case, index 02 x 2 (to get even byte boundary) + A0 - A4. If no possible move (no non-null index) is available, concede game to human player.

3. Note the address of the index used - in this case "56."

4. Jump using indirect addressing to the move's code and execute - in this case, location D2.

5. Evaluate board for win or loss.

6. If loss has occurred, null the location of the last index used - in this case "56", thereby removing this move from the machine's repertoire of responses to this particular board configuration. If a tie or computer win has occurred, do nothing to the index.

EXAMPLE 2: Assume that the following is in memory after example I is completed;

Location (hex)

56 58 60 62

'.'2*^2x2=4 ,

1 6x2=12—| |

12(C) * AD = AC

A2

.A4 A6 A8 AA

.AC AE

00 D2

00 00 00 E4 ■ EA

. 1st selected ■ 2nd selected

beginning of jump table address of move 1 address of move 2 address of move 3 address of move 4 address of move 5 address of move 6 address ol move 7

code for move 2

lo accomplish:

move" ," tu sq. 0 (blank)

move "X" to sq. 4

jump to continue

code for move 6 to accomplish: move " " to sq. 2 move "X" lo sq. 4 jump lo continue

Suppose move index 2 has been selected. The index "2" is multiplied by 2 (shifted left 1 bit) in order lo produce an even word address, and added to the address of the beginning of the jump table - A0 - resulting in an address of - A4 -. At location A4 is the address - D2 - of the code lo accomplish move #02. At location D2, move 2 consists of blanking the computer's "X" in square 0, and inserting an "X" at square 4, taking your "0". Since this is a losing move, the index 02 will be made null (replacement by 00 is good for error checking), and move 06 will be accomplished in the same manner next lime this board configuration occurs.

biggest hang-up with this program is to get it running correctly in regard to the jump table. If a wrong index is obtained, the program will run off into the boondocks and never be heard from again. Therefore it is nice to include checks on the validity of the index retrieved and to output an error message in the event of something strange happening. A reasonable board may be printed using dashes and exclamation marks. However, if you do this, you will have to "unpack" the board as represented in memory into a more suitable form for 1/0. If you don't have a CRT with machine programmable cursor, you can use the numbers assigned to the squares to indicate your moves. Of course you'll want the machine to have a variety of responses for being blocked, losing and winning. For debugging it is good to output the number of the index which is nulled after a losing game. In this way you may keep track of the learning process as it advances. Also you should be aware that if the human player makes some illegal moves, no model will be found, and a message should be output indicating this fact. But not all illegal moves

Fig. 4. Table of Computer's Moves ("X" Graphic).

COMPUTER'S (X's) MOVES

In a written communication, Martin Gardner points out that the original Hexapawn article is reprinted as Chapter 8, "A Matchbox Game-Learning Machine" in his book The Unexpected Hanging and Other Mathematical Diversions (Simon & Schuster, 1969J. The book version includes updates of the drawings in the original Scientific American article, notes on reader reactions to Hexapawn, and reference to an article on the more general game "Extendapawn." Our thanks to Martin Gardner for his assistance in supplying a corrected version of Fig. 5 for use in BYTE.

will result in an error condition. In this case, should the human player win, the machine will null the last move's index even if it is correct. After this happens a few times, the machine will start making illegal moves, acting illogically, and generally approximating a nervous breakdown!

Programming HEXPAWN will painlessly (?) introduce you to a number of worthwhile aspects of the logical arts. You'll see that many segments of code (such as the board evaluation) are similar and are potential

MOVE INDEX #

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

SQUARE TO SQUARE COMMENTS

0

3

0

4

1

3

1

4

1

5

2

4

2

5

3

6

3

7

4

6

4

7

4

8

5

7

5

8

computer wins!

computer blocked

39

•

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o

2

<£'

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Off. #(5^

6 6

6 6 6 6

Fig. 5. The set of possible Hexapawn game situations faced by the HEXPAWN program after 2, 4 and 6 moves. (Reprinted from Chapter 8, "A Matchbox Game-Learning Machine, " in The Unexpected Hanging and Other Mathematical Diversions by Martin Gardner.)

A BASIC Version of This Program:

For those with systems running the BASIC language, a BASIC version of this program called HEX is found on page 122 of the third printing of 707 Basic Computer Games, available for $7.50 + 50tf postage from Digital Equipment Corp., Software Distribution Center, MaynardMA01754.

candidates for subroutines. You'll see that indirect addressing does indeed have some practical uses, if you can ever get the code debugged. You'll see that it is very important to try and anticipate possible sources of error in your code before you run the program, and at least to include a mechanism to warn you when problems occur. (I didn't anticipate any

problems with the jump table and consequently spent several hours trying to figure out how the move indices were coming up with such strange values. If I had put in some code to check them first, this process would have been shortened considerably.) You'll see that some programs are complex to such a point that you simply cannot sit down and write them without thinking about

the logical design first! You'll see why you should never, ever write programs that are self-modifying in nature (except Al, naturally).

Lastly, amaze (antagonize) your friends by sitting down at your computer and winning four or five games, then inviting them to try. When they can't, you can smile smugly and explain how your computer learns from its mistakes, and so should they!

40

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Computers

And Amateur Radio

Time-sharing by radio? Radio packet switching networks? Program exchange meeting grounds in the high frequency bands? Computer controlled ham radio stations? Read on . . . Mike Gipe provides us with this article on the synthesis of amateur radio and computer hobby activities into a combination which is more fun than the simple sum of parts. While there are no bureaucratic restrictions on home microcomputer systems, there are some federal regulations you must comply with in order to become a ham. For many computer hobbyists, the two-hobby combination would be well worth considering - despite the required ham license exam. Mike provides several references to more detailed information for those individuals who want to check out amateur radio.

Computer construction and programming is the newest hobby in the field of electronics; ham radio is undoubtedly the oldest. The fascination of electronics is certainly a good reason why many people are interested in both computers and ham radio, but it is not the only reason. The two hobbies are complementary. The person who spends his leisure time on both will surely find that one benefits the other, making it more fun. Computers handle information — they receive it, deliver it, condense it, modify it, utilize it and sometimes even mangle it. The versatility of the computer is reflected in the wide variety of information that it is called upon to digest. Ham radio is a hobby dedicated to the art of communication — the transfer of information. Without information, there is no need to communicate, and

42

without communications, the generation of information is useless. (What good is a computer without any I/O?) Obviously, computer buffs find ways to communicate without ham radio, and hams have never been speechless because they didn't have computers. However, marrying the two offers the opportunity to communicate information (of all kinds) on a much wider scale. The computer buff who includes radio in his field of interest will certainly find his hobby more challenging and more rewarding.

It is no surprise, therefore, that many of BYTE's readers are also amateur radio operators. But it is likely that a number of BYTE's readers are not familiar with amateur radio. This article is an introduction to the hobby for these people. Hopefully, it will also suggest some new ideas for those who already

have discovered that ham radio and the computer make an excellent pair.

What is Ham Radio?

Radio amateurs are authorized to transmit and receive signals with their own radio stations. This makes it possible to experiment with many different means of radio communication and to converse with all kinds of people from all parts of the world. The fact that ordinary people can make important discoveries while pursuing a hobby is demonstrated by a number of amateur accomplishments including: transatlantic communication at high f req uencies, moonbounce communication, the practical use of single sideband transmission (SSB), and the increase of our understanding of radio propagation through the atmosphere. The fact that amateur radio is for personal

by

Michael A. Gipe WA3GAU/1 J55 Bay State Road Boston MA 02215

use is s ti pulated by international agreement and federal regulations which enjoin any amateur from exploiting amateur radio for monetary purposes. Amateur radio is a fine hobby; it's fun and educational.

What's Happening

Amateurs have been allotted many segments of the radio spectrum beginning as low as 1.8 MHz. Table I shows the frequency bands available. All types of modulation can be utilized; however, certain types are restricted to selected frequencies for bandwidth and interference reasons. Computer hobbyists will be

The typical (?) ham radio station has various pieces of equipment. For low band work in "single sideband" (SSB) voice communications, the minimum equipment is a transmitter, a receiver (or combination), plus some form of antenna outside on your roof. Such a setup might cost $500 in today's markets - although less expensive radio shacks might be set up by buying used equipment with the guidance of experienced hams in your local amateur radio club.

The real fun starts when you add a computer.

interested to learn that radio teletype is an often used mode. Any person may be authorized to use any frequency and mode available to amateurs or only certain portions, depending on the class of license which he holds. This will be explained later in detail.

Hams have put these resources to a variety of uses, some of them quite exciting. By connecting his receiver and transmitter to the telephone line through a "phone patch," a ham can make long distance phone calls which might not be otherwise possible for economic or technical reasons. Thousands of

soldiers in Viet Nam were able to talk to their families this way. Amateurs also serve the public by providing communications in emergency situations such as fires and floods. It is possible to put an amateur radio station in a car and operate "mobile". Two recent developments have stirred up a great deal of interest: repeaters and satellites. Amateurs have designed and built seven operational earth orbiting satellites since 1961. Of course, NASA helped put them in orbit. The sixth and seventh of the series of satellites, known as OSCAR for "orbiting satellite carrying amateur radio," are now

Band

Frequency

Designation

Range (MHz)

(wavelength)

160 meters

1.8-2.0

80 meters

3.5-4.0

40 meters

7.0-7.3

20 meters

14.0-14.35

1 5 meters

21.0-21.45

10 meters

28.0-29.7

6 meters

50-54

2 meters

144- 148

220 - 225

420 - 450

1215-1300

2300 - 2450

3300 - 3500

5650 - 5925

10000 - 10500

21000- 22000

40000 and up

Table I. Communications frequencies available to amateur radio operators.

43

Ordinary people have made important discoveries in the radio field as amateurs — and you can expect similar things to happen in the computer field as more and more people experiment with the technology.

relaying amateur signals great distances around the globe. Another device used to overcome the line-of-sight distance limitation for VHF and UHF frequencies is the repeater. These receive signals and retransmit them at a different frequency. By installing repeaters at high places like mountaintops and tall buildings, hams can communicate over a wide area with small transmitters. In New England, for example, repeaters have made it possible to talk with people in several states using only a battery-powered walkie-talkie. By installing radio equipment capable of accessing a repeater in his car, a ham can have companionship or emergency aid available at the touch of a button whenever he is driving. A number of frills are also possible with a repeater. Some repeaters have been set up with a telephone line tie-in. This telephone line can be used to make telephone calls from nearly anywhere. Imagine the possibilities — while driving to your girlfriend's apartment you can hit a few buttons on your mobile radio and call your wife on the telephone to tell her that you have to work late!

More computer-oriented hams are needed to push for changes in the regulations to facilitate the computer/radio synthesis.

On To The Good Part

The real fun starts when you add a computer. Your microcomputer (or your mini if you're rich) can be a very useful addition to the ham radio station. It's a great help in calculating orbit data for OSCAR satellite work. The computer could be programmed to figure out when and where the satellite will appear in the sky, ring a bell to warn you, turn on the transmitter and receiver, and point the antenna in the proper direction! A microcomputer can do a very nice job translating and generating Morse code. Along a similar line, teletype code and speed conversions arc easily accomplished by a microcomputer. A few months of thought should give you dozens of ideas for using the computer in the radio station.

The combination of repeater and computer can be powerful. One use for the computer is to control the repeater. Regulations require certain controls on repeater operations. These regulations have undergone substantial changes recently and may change again, so the best way to get the details is to contact one of the sources mentioned at the end of this article. The computer can make it possible to add many very advanced, very fancy features to the repeater. Services beyond the telephone tie-in previously mentioned are possible. Another way to use the computer with a repeater is as a shared data processor. A mini or microcomputer could be accessed by radio through the repeater by many

people. Any ham with a teletype could have access to a computer. Since the possible benefits are so great, it is inevitable that a repeater-computer combination will soon be in operation.

These applications of the computer to ham radio are interesting, but the long distance data communications made possible with ham radio may turn out to be the most valuable result of combining the two hobbies. For the individual computer owner, radio communications means being able to operate the computer remotely from a car, in the next town, nearly anywhere. Moreover, communication between computers is also possible. A large network similar to the ARPA network could be formed, opening the way for sharing programs and ideas. Hobbyists' efforts in this area will supplement current research in radio networking. With computers, nearly anything is possible.

Rules & Regulations

Radio is, by its very nature, an international concern. Periodically, representatives from most of the countries of the world meet and draw up voluntary agreements concerning the use of one of our valuable resources, the radio spectrum. Amateur radio has its foundation in these agreements. It is defined, governed and allocated frequency space. In the United States, the Federal Communications Commission (FCC) writes the rules and regulations, consistent with

international agreement, which govern ham operation here. It may be of interest to point out that hams are regulated by law, but computer hobbyists arc not. The reasons for regulating radio should be fairly obvious.

The rules for ham radio are much more liberal than those for other services. Amateur radio is intended to be flexible and to allow experimentation. According to the internati onal agreement, though, hams must be licensed. The FCC issues licenses and also enacts and enforces the regulations which licensees must follow. The FCC determines what modes of transmission can be used at what frequencies and who gets to use them. Full details about the regulations can be found in the publications listed at the end of this article.

Obviously, computer buffs find ways to communicate without ham radio, and hams have never been speechless because they didn't have computers.

Limitations

Although the rules are designed to be flexible and allow experimentation, sometimes they do not keep pace with the activities currently underway. Some regulations may inadvertantly restrict some harmless operations. Computer applications in ham radio are new and there are a few regulations which might concern the computer hobbyist-radio amateur. Although teletype transmission is allowed on nearly every band, the speed and type of transmission is restricted. Currently, only the five bit Baudot code may be used and the maximum rate of transmission is 100 words

44

per minute (75 baud). ASCII code is not permitted. Since most amateur teletype operation previously was with surplus Western Union equipment, this was no problem. Now, however, it conflicts with computer industry standards. Until the rules can be changed, the microcomputer can be used to convert from one code to the other. One other restriction which may be useful information is that full duplex operation is not permitted. Other aspects of the regulations may dictate certain techniques, but in general the computer hobbyist should find that it is possible to do what he wants, somehow.

The rules can be changed to make things easier, however. Any petition to the FCC will be considered. More computer-oriented hams are needed to push for these changes.

How To Get a License

What are the details about licenses? There are actually two licenses issued by the FCC. One, the operator's 'license, permits the holder to operas '•.:., radfe Station. The othei is a permit to set up a Station at a permanent location. If you wish to set up more than one permanent station, a station license must be obtained for each. However, one station license allows you to set up one permanent station and any number of mobile or portable stations. A set of call letters issued with the license serves to identify the station on the air. The two licenses are distinct but are actually printed on one piece of paper.

According to the international agreement, a person must demonstrate the ability to send and receive Morse code to get a license. He must also demonstrate some knowledge of elementary radio theory and operating techniques. The

FCC conducts examinations for licenses. These are not difficult to pass with a little study, and excellent aids for learning code and theory are available. See the references for some of these.

The license structure is further complicated by different classes. As an incentive to increase skill and knowledge, more operating privileges are granted to those who demonstrate greater proficiency. Each class of license represents a specific set of privileges and a correspondingly difficult examination. There arc currently six classes but changes may occur within the next year. The Novice class is the simplest. The exam is

to get started. The General class license grants its holder permission to operate in a large portion of all bands and all modes. The Conditional class is the same as the General but allows a different application procedure for special hardships. The Advanced class grants more frequency space reflecting the additional technical proficiency needed to pass the exam. The highest class is the Extra class which awards all amateur privileges. It's a complicated system, but it makes it easy to get started and it rewards those who improve their skills.

Actually getting your license is as simple as any bureaucratic operation. You

AMATEU .# GENEW AH,Ay. >v ^ s CLASS . _ ^Sltl 4to^. „

•4?

License . r_j> guiues IT available for each class of amateur license grade. These were nu2* by the 73 staff and are available from Radio Bookshop, Peterborough gH 03458. Morse code tapes are aho available geared to each license grade.

very simple and the privileges are few, but it is an excellent way to get started. The Novice class license requires a 5 word per minute Morse code proficiency. Next is the Technician class. This class is designed for those who wish to do experimental work on VHF or UHF frequencies. Only frequencies above 50 MHz may be used by the Technician. The code test is the same as for the Novice; the theory test is the same as the General class. The Technician class license may be the best way for a computer hobbyist who wants to work with repeaters

must fill out an application, pay a small license fee, and take the tests. Most tests are conducted at local FCC field engineering offices. More details can be obtained by calling the nearest office. The number is in the phone book. After passing the exams and waiting the usual bureaucratic waiting period,

FCC

RULES and REGULATIONS

published by

73MAGA2INE1NC P«>rbo-«i^ NH OjaM

Part 95 of the FCC Rules and Regulations governing amateur radio is available from:

73 Magazine (5(W)

Although ham radio rules are designed to be flexible and allow experimentation, sometimes they do not keep pace with the activities currently underway ...

you should receive your license. It is good for five years, and may be renewed simply by maiing in an ■^"'ilication and a check. The fun is well worth the effort. H6De fully, this has stimulated a little thought about informat',9n anQl communication- w'hsn computers and bam radio are teamed up, the possibilities are limited only by the imagination. Computer hobbyists who are looking for an additional challenge should look at ham radio.

Excellent educational aids are available from:

American Radio Relay League, Inc. Newington CT 06111

and

73 Magazine Peterborough NH 03458

45

The Digital Feedback Loop

Sumner S. Loomis, proprietor of Loomis Laboratories, Route 1, Box 131 A, Prairie Point MS 39353, provides this set of pictures represented in his version of the Hogenson oscilloscope graphics display design printed in BYTE #2. Mr. Loomis built the graphic interface using a preliminary version of the PC board for the scope display, but with one modification: he used CMOS instead of TTL integrated circuits. The following are his comments on the scope display as implemented in CMOS:

I found that adjustment of R1 and R2 pots can cause the DACs (IC15 and IC16) to overheat. ( believe that this is why one of my DACs now exhibits a slight overlap in the digital ramp (bit 4 is off value). I would recomrr;encj that these pots be ^j at

maximum resistance setting, and it. >r> mjtia| setup tne

pots sm»uld be advanced while observing the respective output ramp on an oscilloscope. Decrease the resistance setting until the maximum height ramp (without clipping), is obtained. The overheating problem occurs with severe clipping, which happens at the low resistance setting.

I found it necessary to change IC17 to an LM318, which has better high frequency response for the fast sweep rate of this ramp. My conversion of the digital

ICs to CMOS was also successful, without a hitch. I am very pleased with the low power drain and logic swings from rail-to-rail that result from this change rne

substitution was accomplished as follows:

IC1 becomes 74C10 IC2 becomes 74C04 IC3 becomes 74C00 IC4 becomes 74C00 IC5 uses 7408 TTL (no 74C series equivalent) IC6 becomes 74C155 IC7-IC10 become 74C193

I am going to have to change the Z-axis op amp in my display unit to accommodate the high frequency drive. The present amplifier is too slow, and causes some smearing of the dots as well as low brightness on lone dots. Everything else checks out OK!

BYTER's DIGEST

i

\ \ \ V ~+1°

\ X \ _ov

,

— —>

to

.

X & Y OUTPUTS (STAIR STEP R£MPS)

Fig. 1. Staircase ramp wave forms for X and Y drives.,[Tim jfeture illustrates the stepping of the X and Y drive SA£ tfjiputs during several sweeps of t1'" djs**1 -l?r

Fig. 2. A full raster achieved by turning on the scan and disconnecting the Z modulation input from the scope.

46

Fig. 4. A pattern of horizontal dots programmed into the display by hand.

Fig. 5. Mr. Loomis used an interesting trick to achieve the printout in this illustration — he changed the main timing capacitor of the 555 osciJiator to 5 microfarads and used the much slower sweep to drive an X-Y plotter. In order to get hard copy printouts (albeit slowly) about aJJ one would have to add is a jury rig "intensity" modulation input to raise and lower the recorder pen under control of the interface. Refinements such as superimposed small amplitude X-Y oscillations could be used to draw small lissajous-patterns (circles or figure eights) at each "on " point of the hard copy.

47

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Ordering Imtructfibns

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Have you ever wondered how Santa keeps track of all the addresses of all the children in the world? How he knows who gets what?

With an Altair 8800, Santa might have a fighting chance. He might be able to keep up with the ever-expanding toy industry. He might be able to remember who's been naughty and nice.

With an Altair 8800, Santa might be possible.

This Christmas you can do something that's never before been possible. You can put an Altair under your tree or under the tree of a friend. Or you can start with our special Christmas 75 time payment plan!*

The Altair 8800 is the NUMBER ONE hobby computer in the whole world. No other computer offers you the power and versatility—the proven track record —of the Altair 8800 at a comparable price. No other hobby computer offers you the sophistication of Altair BASIC software or the wide variety of Altair modules and peripherals. No other hobby computer offers you the customer support of an Altair (free membership in the Altair Users Club, free access to the Altair Service Department and the Altair Software Library, and a free subscription to the Altair monthly publication, Computer Notes).

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Total Price: $544 (Retail price: Altair $439, Memory $97, Postage and handling $8 —total $544)

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"The Cornier II Computer Terminal has a full alpha-numeric keyboard and a highly readable 32-character display. It has its own internal memory of 256 characters and complete cursor control. Also has its own built-in audio cassette interface that allows you to connect the Comter II to any tape recorder for both Storing data from the computer and feeding it into the computer. Requires an RS232 Interface Card.

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51

notes on parallel output interfaces

by

Carl Helmers Editor, BYTE

One way to connect an extra output port for a teletype or other peripheral to your CPU is to make the interface simulate a memory address during the writing operations. This method is the one which is used for both the input and output functions in computers such as the PDP-11 of DEC, or the Motorola 6800 microcomputer. The method can even be used to overlap a usable

main memory address since the CPU could care less whether or not the addressed port is connected in addition to the proper main memory location! The same method can even be used on computers such as the Altair 8800 which split the CPU bus into two parts and thus complicate the interface picture.

All of the microcomputers I have seen to date for the

home brew computer market operate with a degree of parallelism at the bit level. Whether the chip is 4-bit, 8-bit or a 16-bitter, the concept of "parallel" data is built in. Data is parallel in nature if each bit has one line assigned to it and transfers of a group of such bits are always made simultaneously. Thus for example, the address lines used to select memory words are usually done in

Fig. I. 8-bit bus output latch.

BUS RECEIVERS (OPTIONAL)

COMPUTER SIDE

D2 +

D3 +

I D4 +

D5 +

D7^

Al +

A2 +

A3 +

A4 +

A5 +

A 6 +

A 7 +

A8 +

A 9 +

AIO +

All +

A 12 +

A 13 +

A 14 +

AI5 +

RW +

<r

X

19

20

8

BIT

LATCH

(74100)

CLOCKS

TO

23

7404

5|V6

ADDRESS

DECODE AND CONTROL LOGIC

CLOCK

WRITE

H>

WRITE +

TO PIN NO. I FIG 3

PULSE

IC 7400

TO 0+ FIG 3

BUS BOUNCE

5

LDO +

4

LDI +

II

LD2 +

10

LD3 +

18

LD4+ /

17

LD5 +

22

LD6 +

21

LD7 +

ONE-BYTE LATCHED DATA TO OUTSIDE WORLD

POWER PINS

+5V GROUND

7400 14 7

7404 14 7

74109 16 8

74100 24 7

52

in memory address space

parallel in CPU designs of practical utility. With the bus oriented computer chips likely to be used for homegrown systems, it is possible to grab data from the busses by latching it in a register which listens to the bus continuously but is only written when the proper address is found. This article concerns such latching of output data and suggestions about several applications of the technique.

The basic idea of the bus output is illustrated in Fig. 1. Fig. 1 shows a set of data lines (denoted D0+ to D7+ to indicate a positive logic definition) constituting an 8-bit data bus. In a 16-bit computer, this set of lines might be one or the other half of the 1 6-bit data bus, or the logic might be extended to 16 bits. Connected directly to the bus pins of the interface I have noted a set of "bus receivers". This circuit should be put in if necessary to maintain consistency of bus loading with all the other bus interconnects. For instance, with a tri-state 8833 circuit as the bus definer, up to 100 high-impedance PNP-input receivers (input side of 8833) can be connected to the bus. But put a TTL load on, and the fanout will be reduced considerably. (For an Altair 8800, the data bus is split into two components: in and out. The principle of minimizing the loading of the Altair drivers (TTL) would indicate use of a low power (74Lxx) device as the bus

receiver. A non-inverting receiver is to be preferred in order to keep the same logical sense of the data to be stored in the latch.)

Following the bus receiver, a latch is shown. The latch illustrated with its pinouts is the 8-bit, 24-pin package called a 74100. Alternate circuits for this function include a pair of 7475s, or even four dual master slave flip flop packages, such as 7473s. In general, it will pay to use the larger scale of integration from a powerbudget standpoint. Consider the specs for two 7475s (64 mA) versus four 7473s (80 mA). For a sixteen bit output, all that is required is to double the number of bits used for the latch. The latch is used for only one purpose — to hold the data after it is stored, until updated by a later write to the same location.

A latch is required to buffer the output logically in many instances of I/O devices. A primary example of such a case is an output which needs stable data for a much longer period than the short CPU-cycle during which data is stable at the output of bus receivers. If you interface your computer bus to one of the Burroughs SELF-SCAN display devices with the memory option, for instance, your data must be stable for a long period of time (about 60 microseconds). This requirement is necessitated by the need to wait for the shift register memory to cycle around to the proper position

for entry of new data. If your interface is to a digital to analog converter (DAC) presenting a gain control voltage to a computerized audio mixing panel, then you would want the control signal to stay stable for all time until explicitly altered by the CPU.

Fig. 1 is completed by the notation of a big mostlyblank box. Big blank boxes with labels in them are a way of saying "here is a function, but I haven't told you what it is in detail." In this case the function is address decode and control logic for grabbing output data. I have drawn the box with inputs indicated from 16 bits of addressing, an "RW+" signal and a "0+" signal. The logic of this box will respond to a specific address in order to generate a negative logic (WRITE-) pulse which is inverted and used to latch the data at the correct time. The definition of the specific address desired and the decoding are both considered a bit later when Fig. 2 is discussed. The "RW+" signal controls the direction of the CPU's data transfer. If it is logic "1" (high level) then the CPU is attempting to read data from the bus and no clock pulse is allowed to reach the latch, even if the address bits A0+ to A15+ match the desired address. If "RW+" is low, then the CPU is sending data out and a clock pulse is allowed through the address decode and control logic. The clock pulse is taken from the CPU supplied clock 0+ and is

"Big blank boxes with labels in them are a way of saying 'here is a function, but I haven't told you what it is in detail.' "

"The method can even be used to overlap a usable main memory address since the CPU could care less ..."

53

cascading input for equality is used to enable the comparison: the AND gate "E" detects a CPU write operation as the simultaneous occurrence of the clock 0+ and a low state of RW+.

Fig. 2. Single-address 16-bit decode with 7485. "Xn " (n=Q to 15) is logical 1 or 0 defining desire address.

RW+

PULSE ONLY IF WRITE CYCLE

AO + A I + A2+A3+

A4 + A5 + A6+A7+

® 74 8 5

INPUT OUT > <

F

-XO+ -X| +

-X2 + -X3 +

In

H2_

IN

®

7485

INPUT o.

P

15

-X4+ -X5 + -X6 + -X7 +

zy

WRITE

PULSE

7420

a positive logic signal indicating that valid data is present.

Assuming you actually want to grab some data off the bus at a specific location when it is referenced, how can you implement the address decode and control function? Fig. 2 is a suggestion of one method to accomplish this function for a specific Ioca t ion at a co ns i de rable price in hardware: using more than one memory location defined

POWER CONNECTIONS

+ 5V GROUND 7485 16 8

7420 14 7

in this way would rapidly lead to a large parts count for 7485s as decoding logic. The basic idea of Fig. 2 is to use the 7485 comparator circuits to check for equality between the address lines A0+ to A15+ and a set of "desired address" definition lines, X0+ to XI5+. The comparison is done as four groups of four bits, and a parallel logical product (AND) of the results of all four bit-group comparisons is performed by the 7420. The comparators'

A Hardware Memory Contents Monitor

A particular application for which single-address decoding might be useful is as a debugging tool based on this circuit, used to monitor the last content written into a specific location. Such a debugging tool can be built by defining the X0+ to XT 5+ address lines as the outputs of a set of four hexadecimal switches or six octal encoded switches, hand set from the panel of the debugging instrument. Then the outputs of the latch circuit might be routed to a set of hex or octal LED drivers so that a display of each number written might be obtained. A more general variation of the same theme would be attainable as a bus monitor device if the gate E of g Fig. 2 is eliminated entirely and the clock 0+ is simply used as the enable condition of the comparators (pins 3 get 0+). Then the "memory contents monitor" always shows the contents of the memory bus at the time it was last used with the desired address.

Adding a Longer Clock

It is often necessary to obtain a clock signal which is longer than the original latching clock. In such cases the longer clock must also occur during a time when the latched data is stable, i.e., after the CPU is finished with its addressing of the output latch. One way to generate such a delayed longer clock is to use the analog timing elements called "one shots" — such as the 74122 or 74123 circuits. In order to do so, however, you will have to calculate a bunch of resistor

54

Fig. 3. Generating a longer clock digitally.

EXTWRITE +

7404

JT^

_TT

7400

FROM FIG I

I SET-RESET FLAG

s-l

WRITE- |

|0+ 2

—f —* "

L0GIC4

f—

CLR PRE

J+ Q +

K- 0

CLK

d

7400__

6 14

•—

15

II

\ / 74109

DIGITAL

SYNCHRONOUS

ONE-SHOT

CLR PRE

J+ Q +

B

K- 0

CLK

12

and capacitor values for the delays, put in your nearest approximations and cross your fingers. A better way to achieve a deterministic system is to use entirely "synchronous" logic concepts and delays implemented with gates and flip flops.

Fig. 3 and its corresponding timing diagram Fig. 4 is a detail of one method to cue a long but delayed clock pulse. The basic idea is to set a flag (the SR flip flop formed by the two NAND sections and labelled "flag") when the I/O write occurs. This flag becomes data which will get clocked synchronously into flip flop A, then into flip flop B. The output of flip flop B is used to enable a reset pulse to the flag, which brings the system into a stable quiescent state until the next output WRITE- pulse occurs. The timing diagram of Fig. 4

illustrates how the synchronous operation produces an auxiliary pulse (Q+- of flip flop B) which is 2 clock periods in length. This clock is delayed with respect to setting the flag by the

original WRITE- pulse, but the delay is fixed and synchronous due to the fact that the actual clock (or its inverted e derivative) is used to cause all state changes of the flip flops.

Fig. 4. Timing: external write vs. buffer write.

*2 +

WRITE + | j

Q+OF FLAG +

Q+OF A

Q+OF B

WRITE+ p> B

BUFFER WRITE

EXTERNAL WRITE

J~L

TIME SEPARATION

pi ■ .OR.

55

Son of Motorola (or,the$20CPU Chip)

Would you believe - another microprocessor? You bet. The calculator firm, MOS Technology of Norristown, Pennsylvania, has just recently announced a new microprocessor which combines plug in compatibility with the Motorola 6800 and a new instruction set to come out with yet another option for microprocessor users - but at a price of $20 in single quantities. Here comes the under $200 processor kit? Not quite yet, but maybe within a year or two. (It's already to the point where the sheet metal and transformer iron of a home computer often cost more than all the silicon products which make it work . . . this new low on CPU prices just compounds the problem.) It may be three to six months before you see one of these new MCS6501 processors designed into a kit, so Dan Fylstra in his article covers quite a few details of the Motorola 6800 by way of comparison with "Son of Motorola. "

We thought that the "age of the affordable computer" had arrived when you could buy a microprocessor chip for $150. But the potent combination of new technology and free enterprise has brought about developments beyond our wildest expectations.

So now you can buy your microprocessor brand new, in single quantities, for $20. The new offering is from MOS Technology, Inc., and is pin-compat'ible, but software-incompatible with the Motorola 6800 microprocessor. Although it will be a while before the new chip finds its way into rcady-to-build kits for the hobbyist (after all, the first Motorola 6800 kits have just been announced), the news should be of interest to nearly every home brew computer experimenter. So here's a comparison of the

Motorola 6800 and the MOS Technology 6500 series, based on the information presently available. If you aren't already familiar with the Motorola microprocessor, don't worry — we'll cover its major features in the course of the comparison.

Hardware Comparison

Both the Motorola 6800 and the MOS Technology chip are TTL-compatible devices, operating from a single five volt power supply. Like earlier microcomputers, such as the Intel 8008, 8080 and National PACE, these processors make use of a bidirectional data bus, to which both memory and input/output devices may be connected. However there are no special input/output instructions in the instruction repertoire of either the Motorola or MOS Technology microprocessors. Output of a

character, for example, is accomplished by storing a value into a certain memory location, which is in reality a special register inside an external I/O interface chip, connected to the data bus just like any other RAM or ROM chip.

Motorola supplies a Peripheral Interface Adapter (PIA) chip which connects to the data bus for 8-bit parallel I/O, and an Asynchronous Communications Interface Adapter (ACIA) for bit-serial input/output. (The ACIA is simply a type of UART, as discussed in Don Lancaster's September article on serial interfaces. It may be used to connect a teletype or CRT terminal to the microcomputer system.) MOS Technology plans to supply a similar set of chips.

Most of the time, data is being transmitted between the microprocessor and the

by

Daniel Fylstra Associate Editor, BYTE 25 Hancock St. Somerville MA 02144

memory chips over the data bus. But the processor can also disconnect itself from the bus, enabling, for example, a data transfer to take place directly between an I/O device and memory. Both the Motorola 6800 and the MOS Technology chip have three-state buffers for the eight data lines, enabling them to disconnect from the bus in this fashion. But the Motorola also has three-state buffers on its 16 address lines, whereas the MOS Technology chips do not.

This would be used, for example, in a floppy disk controller which is capable of transferring a whole block of many bytes of data in response to a single command from the CPU. The controller would present a series of addresses on the 16 address lines, and data bytes on the data lines, causing the bytes to be stored in a series of locations in some RAM chip on the bus; all this would take place in the intervals when the CPU itself was disconnected from the bus.

As a practical matter, however, small systems do not require this kind of direct memory access (DMA) capability, and larger systems with more devices on the bus will require buffers on the

56

Ready or not, here I come: 6800 to 6501.

address lines to supply the necessary power — and these buffers may as well have three-state outputs.

The other major hardware difference between the Motorola 6800 and the MOS Technology 6500 series is that the MOS Technology chip has an 8080-style Ready line, whereas the Motorola 6800 does not. The Ready line is used to make the microprocessor wait for a variable length of time before going on with the execution of an instruction. This feature makes it easy to use the less expensive memory chips, especially for Programmable or Erasable Read-Only Memory (PROM or EROM) which are not as fast as the CPU itself. It is possible to use such devices with the Motorola 6800, of course, by stretching out one of the clock phases to as long as five microseconds. But the availability of the Ready line on the MOS Technology chip is certainly a convenience, and allows you to use extremely slow memories if you wish.

The MCS6501, first in the MOS Technology 6500 series, requires the same type of external clock as the Motorola 6800. But for $25 you can have the MCS6502, which includes an on-the-chip clock, driven by an external single phase clock or an RC or crystal time base input. As the manufacturer suggests, it is probably cheaper in an original design to use the MCS6502 than to provide the external logic to generate the two-phase clock.

To sum up, both the Motorola 6800 and the MOS Technology have comparable features with some differences. In terms of hardware differences, the

MOS Technology Ready line is probably more valuable than the three-state address line buffers available on the Motorola 6800.

A final hardware advantage possessed by the MOS Technology chip is speed. The Motorola 6800 cycle time is one microsecond (1 MHz clock rate), and a typical instruction takes about three clock cycles. While the cycle time of the MOS Technology chip is nominally the same, the company has hinted broadly that the chip can be run at clock rates of 2 or even 3 MHz. Of course, one would have to use faster and more expensive memory chips to take advantage of this increased speed.

In addition, certain critical instructions take fewer cycles on the MOS Technology chip. An STA (store accumulator) instruction referencing an

Table I. Functionally equivalent instructions for both the Motorola 6800 and MOS Technology MCS6501 microprocessors. The mnemonics are Motorola's. Of course, these instructions operate on the A accumulator only in the MCS6501, but can address either accumulator in the Motorola 6800. The BIT instruction (*) has a different effect on the V and N processor flags in the MCS6501.

ADC

DEX

AND

EOR

ASL

INC

ASR

INX

BCC

JMP

BCS

JSR

BEQ

LDA

BIT*

LDX

BMI

LSR

BNE

NOP

BPL

ORA

BVC

PSH

BVS

PUL

CLC

ROL

CLI

RTI

CLV

RTS

CMP

SBC

CPX

SEC

DEC

SEI

STA

STX

TSX

TXS

arbitrary location takes 4 cycles, versus 5 for the Motorola, and a JSR (jump to subroutine) instruction requires 6 cycles, as opposed to 9 on the 6800. Conditional branches take 4 cycles on the Motorola microprocessor, while they take 2 cycles if the condition is false and 3 if it is true on the MOS Technology chip. Because these instructions are so frequently executed in most programs, the 6500 series should enjoy a performance edge over the Motorola 6800 even at the same clock rate.

Software Comparison

We can treat the instruction set architecture of the two processors in two stages, first considering the facilities for manipulating data and then dealing with the facilities for manipulating addresses. Both features are important to the overall effectiveness of the processor design.

Data Manipulation

The instructions for manipulating data arc quite similar on the two processors. There are two major differences: First, the Motorola 6800 has two 8-bit accumulators, A and B, while the MOS Technology chip has only one accumulator, A. Second, in addition to conditional branches for unsigned comparisons, the Motorola 6800 has special branch instructions for signed comparisons, but the MOS Technology chip does not. (The signed comparisons treat the two values as positive or negative numbers in two's complement notation, in the range -128 to +127. For example, —1 is represented as 28-1 = 11111111. An unsigned comparison would treat this quantity as the largest possible (8-bit) value, whereas a signed comparison would treat it as smaller than, say, zero.)

Table I lists the instructions which are the

We thought that the "age of the affordable computer" had arrived when you could buy a microprocessor chip for $150. But the potent combination of new technology and free enterprise has brought about developments beyond our wildest expectations.

same for both processors, wh il e Table II lists instructions on the Motorola 6800 which must be replaced by more than one instruction on the 6500 series microprocessors.

Some of the instructions omitted on the MOS Technology chip are merely incidental; others are more serious. The lack of signed comparisons represents a real inconvenience in many applications. The lack of a simple ADD instruction means that an operation such as A = B + C on one-byte operands must be coded with a "Clear Carry" (CLC) as in this example:

CLC

LDA B

ADC C

STA A

on the MOS Technology chip.

On the other hand, a computation such as A = B + C — D could be coded as

CLC

LDA B

ADC C

SBC D

STA A

assuming that the inclusion of "carry" in both operations is indeed desired.

Less serious but still irritating are the absence of the ROR (rotate right), NEG (negate) and COM

57

Table 11. Motorola 6800 instructions which have no direct equivalent in the MCS650J. The information in this table is taken from MOS Technology documentation on the 6500 series.

Motorola 6800 Instruction

Equivalent 6500 Series Sequence

ABA

No B accumulator

ADD

CLC, ADC

BGE loc

BMI *+6, BVC loc, BVS *+4, BVS loc

BGT loc

BMI *+6, BVC *+6, BVS *+6, BVC *+4,

BNE loc

BHI loc

BCS »+4, BNE loc

BLEIoc

BEQ loc, BMI *+6, BVS loc, BVC *+4,

BVC loc

BLS loc

BCS loc, BEQ loc

BLT loc

BMI *+6, BVS loc, BVC *+4, BVC loc

BRA

JMP

BSR

JSR

CBA

No B accumulator

CLR [loc]

LDA #0, [STA loc]

COM [loc]

[LDA loc] , EOR #$FF, [STA loc]

DAA

Replaced by SED

DES

Use PHA

INS

Use PLA

LDS loc

LDX loc, TXS

NEG [loc]

EOR #$FF, ADC #1 [or LDA #0, SBC loc)

ROR [loc]

[LDA loc] , PHP, LSR, PLP, BCC *+4,

ORA #$80, [STA loc]

SBA

No B accumulator

SEV

LDA #1, LSR

STS loc

TSX, STX loc

SUB

CLC, SBC

SWI

BRK saves state without transferring

control

TAB

No B accumulator

TAP

PHA,PLP

TBA

No B accumulator

TPA

PHP, PLA

TST

BIT#0

WAI

JMP *

op disp, X

LDY #disp, op <2>loc, Y

[indexed addressing mode]

[indirect indexed addressing mode]

(complement) instructions, as well as single-byte instructions to increment and decrement the accumulator. Probably the least significant difference is the omission of the B accumulator on the MOS Technology chip. This is more than made up for by the availability of an extra index register (see below).

All in all, the Motorola 6800 comes out ahead when considering facilities for manipulating data, the most important point in its favor being the availability of the signed comparisons. Generally speaking, however, the basic instructions available on the two processors are quite similar.

Address Manipulation

The greatest architectural differences between the two processors lie in their facilities for manipulating addresses, or their "addressing modes" - and here the MOS Technology chip has much more to offer.

The two microprocessors are the same in one respect: both have special "short forms" of most instructions for referencing the first 256 bytes of memory. This is called "direct addressing" on the Motorola 6800, and "zero page addressing" on the MOS Technology chip. As an example, the most general LDA (load accumulator)

instruction is three bytes long; the second and third bytes form the effective address (0-65535), which can reference any byte in memory. The short form of the LDA instruction, however, is two bytes long; the second byte forms the effective address (0-255) of a byte in the first "page" of memory. The "short form" instructions generally take one fewer clock cycle to execute, since only two rather than three instruction bytes must be fetched from memory.

The major differences between the two processors lie in the important area of indexed addressing. The

Motorola 6800 has a single 16-bit index register, called X. Essentially all instructions have an indexed addressing form, in which a one-byte displacement (0-255) is added to the address in the index register to form the effective address. The MOS Technology chip, on the other hand, has two 8-bit index registers, called X and Y. All of the computational instructions have indexed addressing forms in which either a one- or two-byte base address is added to the contents of either the X or the Y register to form the effective address.

Which approach is the better one? For the purpose of accessing elements of arrays, or tables of many identical elements, the MOS Technology chip comes out way ahead. This is partly due to the lack of certain critical instructions on the Motorola 6800, such as an instruction to add the contents of an accumulator to the index register, or even to transfer the value in the accumulators to the index register.

Suppose that we wish to add the Ith element of an array, S|, to another variable, T. In general, the array may be located anywhere in memory, and the subscript I may be the result of some calculation done in the accumulators. Letting S denote the address of the zeroth element (the base address) of the array, and assuming that the value of the subscript I is already in the A accumulator, consider the instructions necessary to accomplish this operation on the two processors.

The biggest difference is in the area of addressing modes, an area where the 6500 series devices far outshine the Motorola 6800.

58

On the Motorola 6800,

our first try yields the

following:

SHI EQU S/256*256

CLR B

ADD A#S-SHI ADC B #S/256 STA ATEMP+1

Calculate the indexed address

STA BTEMP

LDX TEMP

LDA A 0, X ADD AT STA AT

Perform desired computation

This instruction sequence requires 19 bytes, counting the two-byte temporary TEMP and assuming that TEMP and T are located in the first 256 bytes of memory. Since the array S could be anywhere in memory, we were unable to use the displacement field of an instruction with indexed addressing for the array base address, and instead we had to add the array base to the index (in double precision), store the result in memory, load it into the index register, and finally reference the array element S|.

We can improve on this with the aid of a little lateral thinking. Noticing that the 6800 is actually capable of adding a one-byte quantity to a two-byte address, but only in a storage reference with indexed addressing, we will split up the base address into two parts to arrive at a better solution:

SHI EQU S/256*256

STA ATEMP+1 LDX TEMP LDA AS-SHI, X ADD AT STA AT

TEMP FDB SHI

This instruction sequence requires only 12 bytes, under the same assumptions.

Even so, we can't match the simplicity of the solution

to the same problem on the MOS Technology chip:

TAX

LDA S, X ADDT STA T

This instruction sequence requires only seven bytes. Only four bytes were needed to reference the element S|, versus eight for the Motorola 6800.

How important is this improvement? It is certainly significant, since arrays and tables are used so frequently in programs of any size. On the other hand, in many applications it is only necessary to reference each element of an array in turn; it is not necessary to access elements randomly based on a computed subscript. In this case, we can obtain better code on the Motorola 6800 by first loading the array base address into the index register, and then referencing each element directly (i.e., with a zero indexed address displacement), incrementing the address in the index register using the INX instruction to proceed from element to element. We are therefore using the 6800's index register to hold a pointer or indirect address rather than an index.

An even more important difference between the two microprocessors in that the MOS Technology chip possesses two (8-bit) index

registers, X and Y, whereas the Motorola 6800 has only one (16-bit) index register X. As we shall see, two index registers are far more valuable than two accumulators. This is because p rograms frequently manipulate two (or more) tables, or other indirectly addressed variables, at the same time. As an example, we will consider perhaps the simplest operation of this type, the problem of moving a string of bytes from one area of storage to another. Assume that 20 bytes, starting at the location denoted by the symbol FROM, are to be moved to the area starting at the location denoted by the symbol TO.

On the Motorola 6800, we can write the following routine:

LOOP LDX FRPTR1 Fetch LDA A O, X J FROM LDX TOPTR" STA A O, X . INC FRPTR" INC TOPTR DEC COUNT

BNE LOOP Test

continuatio

FRPTR FDB FROM TOPTR FDB TO COUNT FCB 20

This routine requires 24 bytes, including the working storage locations, and executes in 820 clock cycles. This routine can move up to 256 bytes.

On the MOS Technology chip we have the following solution:

LDX #0 LDY #0 LOOP LDA FROM, X STA TO, Y INX INY

DEC COUNT BNE LOOP

COUNT FCB 20

Two index registers are far more valuable than two accumulators.

This routine requires 17 bytes, and executes in 404 clock cycles. The improvement in speed clearly depends on the number of bytes to be moved; each pass through the loop in the Motorola 6800 routine takes 41 clock cycles, while each pass through the loop in the MOS Technology routine takes 20 cycles. (The MOS Technology routine is also limited to moving at most 256 bytes.)

Once again the degree of improvement is substantial, and the improvement is

Move TO

change pointers

1 l

2 t

3 I

4 I

5 I

6 ! 7 8 9

10 i

1 1

12

13

14

15

16

17

18

19

20

vss

O Reset

_J

Halt

TSC

Z3

01

N.C.

zn

Frq

02

=i

VMA

DBE

m

NMI

N.C.

ZD

BA

R/W

=]

vCc

DO

Z3

AO

D1

Z3

A1

D2

=1

A2

D3

ZD

A3

D4

=3

A4

D5

=3

A5

D6

m

A6

D7

za

A7

A15

=i

A8

A14

Z]

A9

A13

13

A10

A12

_D

A11

vSs

=1

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21

Fig. 1. The pin assignments of the Motorola 6800 (and by implication, the MOS Technology MCS6501). VSS >s ground (0 volts) and Vqc is +5 volts. The A lines are address outputs, and the D lines are bidirectional tristate data bus lines. For details see the Motorola and MOS Technology documentation of these parts.

59

7

0

ACCA

7

0

ACCB

15

15

PC

15

Accumulator A Accumulator B Index Register Program Counter

Stack Pointer

Condition Codes Register

L Carry (From Bit 7)

— Overflow

— Zero

— Negative

— Interrupt

— Half Carry (From Bit 3)

Fig. 2. The programmer's view of the 6800 CPU. This diagram, excerpted from the Motorola 6800 documentation, shows the various registers of the CPU including the processor's condition code register. Note the similarity to the MCS6501 in Fig. 3.

significant because this type of problem arises so frequently in large programs. The MOS Technology chip has some additional addressing modes not possessed by the Motorola 6800. First, there is a "short form" for instructions with simple indexed addressing if the array base address is in the first "page" (256 locations) of memory. This feature is of somewhat

limited use except in very small programs, since only a few small arrays can actually be placed in the first 256 locations. Of greater interest is the so-called "indirect indexed" addressing mode. Instructions with this type of addressing are two bytes long;

the second byte specifies the address of a two-byte constant in the first page of memory. This two-byte constant then becomes the "array base address," and the contents of the Y register are added to this constant to form the effective address. This addressing mode is very useful: In a program with many references to a particular array or table

which is too large to place in the first page of memory, one can trade space for time by placing the array base address in the first page of memory, and then referencing elements of the array using indirect indexed addressing. Each element reference takes less space (two bytes instead of three) but more time (five cycles instead of four) than would be required for ordinary indexed addressing.

There are two other addressing modes on the MOS Technology chip which are somewhat less useful. The first is called "indexed indirect" addressing: Here the contents of the X register are added to a one-byte base address to obtain the address of a two-byte constant in the first page of memory. The contents of this two-byte constant then becomes the effective address. Unfortunately this addressing mode is not available for the J MP instruction, where it would be most useful: It could be used to implement a "jump table," or a "computed GO TO" or "CASE statement" in some high-level languages.

Finally, two other addressing modes are used with branch instructions:

One unfortunate feature of the MOS Technology chip's many addressing modes is that they do not apply consistently to all instructions.

15

0

r L

15

0

r

L

A

15

0

r

L

Y

15

0

r L_

X

15

0

1

1 PCH

PCL

15

0

I/O REGISTERS

ACCUMULATOR

INDEX REGISTER Y

INDEX REGISTER X

PROGRAM COUNTER

STACK POINTER

PROCESSOR STATUS REGISTER.

-CARRY (BIT 71 -ZERO

- INTERRUPT DISABLE

- DECIMAL MODE

- BREAK COMMAND

" FORTHCOMING FEATURE

-OVERFLOW

-NEGATIVE

Solid line indicates currently available leatures Dashed line indicates lorihcoming members of lamih

Fig. 3. The programmer's view of the MCS6501 CPU. This diagram, excerpted from the MOS Technology 6500 series preliminary documentation, shows the various registers of the CPU. Note the similarity to the Motorola 6800 diagram in Fig. 2.

60

Table III. Instructions, addressing modes and execution times for the Motorola 6800 processor. Execution times are in "machine cycles" which for a 1.0 MHz clock take 1.0 microsecond apiece. This table is excerpted from Motorola documentation on their processor.

c

i

O

3

Q

X

u

u

<

■o

1

E

Q

■o

C

HJ

c

E

or

■o e

o

Q

X

u o

<

•

1

E

Q

S

c

UJ

C

Q.

E

ABA

•

•

«

•

2

INC

2

6

7

•

ADC

X

2

3

4

5

INS

a

•

4

ADD

X

2

3

4

S

INX

•

•

4

AND

X

2

3

4

5

JMP

3

4

a

ASL

6

7

JSR

9

8

a

ASH

6

7

LDA

x

2

3

4

5

a

BCC

4

LDS

3

4

5

6

s

BCS

4

LDX

3

4

5

6

•

BEA

4

LSR

6

7

a

BQE

4

NEQ

6

7

a

BGT

4

NOP

a

•

2

BHI

4

ORA

X

4

5

a

BIT

X

•

PSH

#

•

4

BLE

4

PUL

a

a

4

BLS

4

ROL

6

7

•

BIT

4

ROR

6

7

a

BMI

4

RTI

•

•

10

BNE

4

RTS

a

a

5

BPL

4

SBA

•

a

2

BRA

4

SBC

X

4

5

a

BSH

6

SEC

a

•

2

BVC

4

SEI

•

a

2

BVS

4

SEV

•

•

2

CBA

2

STA

x

4

5

6

a

CLC

2

STS

5

6

7

a

CLI

2

STX

S

6

7

a

CLR

6

7

•

SUB

X

3

4

5

a

CLV

•

•

2

SWI

12

CMP

X

4

S

a

TAB

2

COM

6

7

a

TAP

?

CPX

5

6

•

TBA

2

DAA

•

•

2

TPA

2

DEC

6

7

•

TST

a

DES

•

•

4

TSX

4

DEX

•

•

4

TSX

4

EOR

X

2

3

4

5

•

WAI

9

NOTE:

Inierrupl

tirm

is 12 eye

es f

Om

he end of

the

instruction being ex

jcuted. except follow

ng

a WAI instruction

Then

it i

4 cycles.

Which processor comes out ahead overall? To a great extent it depends on your point of view: Systems programs are better on the MOS Technology machines; applications programs would tend to come out ahead on the Motorola 6800.

consistently to all instructions. For example, the binary arithmetic instructions are available with essentially all addressing modes, but the unary arithmetic instructions are missing the Y-register and indirect modes, and the BIT instruction is missing several others as well. This not only makes programming more difficult, since one must constantly check to see which instruction forms are legal, and program around the exceptions; it also makes the design of an assembler or compiler more complicated. A compiler, in particular, would require complex logic to determine when it could and could not take advantage of the addressing modes.

In summary, the MOS Technology chip comes out ahead when considering facilities to manipulate addresses, and in many cases the advantage realized due to the availability of the extra addressing modes is substantial. The greatest failing of the 6500 series design is the inconsistent availability of the addressing modes from instruction to instruction.

Which processor comes out ahead overall? This is very difficult to judge. It depends partly on whether the programs being executed on the microcomputer are "system" programs, such as compilers, interpreters and I/O controllers, which tend to make heavy use of address

"Relative" addressing, available on both the Motorola and the MOS Technology processors, is used with the conditional branch instructions, which are two bytes long. The second byte of such an instruction specifies a positive or negative displacement in two's complement notation (-128 to +127). The destination address of the branch is taken to be the algebraic sum of the address of the byte immediately fol lowing the branch instruction and this displacement. Of course, this means that it is possible to branch directly to a location within only a certain limited distance from the branch itself; but, more often than not, the range of —128 to +127 bytes is adequate, and a

space savings is realized in comparison to processors such as the Intel 8080 which have only three-byte branch instructions. If necessary, a conditional branch can always transfer to a three-byte unconditional JMP instruction, which can jump to any location in memory. On the MOS Technology chip, a JMP instruction can also specify "absolute indirect" addressing: In this case, the second and third bytes of the instruction specify the address of a two-byte constant anywhere in memory, and the contents of this two-byte constant becomes the destination address for the jump.

One unfortunate feature of the MOS Technology chip's many addressing modes is that they do not apply

Table IV. Instructions, addressing modes and execution times for the MOS Technology MCS6501 processor. Execution times are in "machine cycles" which for a 1.0 MHz clock take 1.0 microsecond apiece. This table is excerpted from MOS Technology documentation on their processor.

x >

x >

: > liSggllllllfl

<£NNN<<«trrr=. = <

ADC 234 44-4" . 65*. JSR

AND 2 3 4 4 4-4*. 65* LDA

ASL 2.56.67 LDX

BCC 2". . . LDY

BCS 2". LSR

BEO. , 2". . . NOP

BIT .3.4 ORA

BMI 2". . PHA

BNE 2" . PHP

BPL 2". . . PLA

BRK PLP

BVC 2". . . ROL

BVS 2". , . RTI

CLC . . 2 . . . . RTS

CLO 2 SBC

CLI 2 SEC

CLV 2 ... SED

CMP 2 3 4 4 4* 4* . 6 5* SEI

CPX 2 3.4 STA

CPY 23.4 STX

DEC 5 6.67 STY

DEX 2 TAX

DEY 2 TAY

EOR 234. 44*4*. .65 TSX

INC .5667. TXA

INX 2 , TXS

INY 2 . . . . TYA

JMP 3 5

Add one cycle il indexing across page boundary

** Add one cycle if branch is taken. Add one additional ■!

E -8

S * 3 I

i page boundary

61

In favor of the 6500 series are price and speed; in favor of the 6800 are availability and very good Motorola documentation.

manipulation facilities; or application programs, which make greater use of data manipulation facilities. One would expect better results in the former case with the MOS Technology chip, and in the latter case with the Motorola 6800. One would also expect the MOS Technology chip to enjoy an advantage on large programs, since larger programs inevitably tend to make use of tables, subroutines with parameters, and other forms of address manipulation.

All in all, the Motorola 6800 comes out ahead when considering facilities for manipulating data .. . but nevertheless the two processors are quite similar.

Against these factors one must weigh the availability of an excellent applications manual, proven software, and kits for the hobbyist for the Motorola 6800 microprocessor. At the same time, the MOS Technology chip's price can't be beat, and its speed advantage may be important for some purposes.

At the time that this article is being written (late August), the MOS Technology chip is just a promise: The chip should be available for purchase at the Western Electronics Conference (Wescon) in San Francisco, September 16-19. By the time you read this, the chip itself should be in the hands of at least a few hobbyists. Let's have some letters to BYTE describing initial experiences with the new microprocessor! Send your comments to the author or to the editor of BYTE. In the meantime, we'll be waiting to see what new surprises the semiconductor houses and kit manufacturers have in store for us. And BYTE will try to keep you up to date on the latest developments in the world's hottest, fastest-moving hobby — home computers!

Table V. MCS6501 microprocessor instructions, listed in alphabetical order by mnemonics. The instructions with asterisks are similar to the same mnemonics in the Motorola 6800 processor.

•ADC

Add with Carry to Accumulator

*JSR

Jump to New Location Saving Return

Address

'AND

"AND" to Accumulator

•LDA

Transfer Memory to Accumulator

*ASL

Shift Left One Bit (Memory or Accumulator)

•LDX LDY

Transfer Memory to Index X Transfer Memory to Index Y

'BCC

Branch on Carry Clear

•LSR

Shift One Bit Right (Memory or Accur

nulator)

•BCS

Branch on Carry Set

•BEQ

Branch on Zero Result

NOP

Do Nothing - No Operation

'BIT

Test Bits in Memory with Accumulator

•0RA

"OR" Memory with Accumulator

"BMI

Branch on Result Minus

*PHA

Push Accumulator on Stack

•BNE

Branch on Result not Zero

PHP

Push Processor Status on Stack

*BPL

Branch on Result Plus

•PLA

Pull Accumulator from Stack

•BRK

Force an Interrupt oi Break

PLP

Pull Processor Status from Stack

•BVC

Branch on Overflow Clear

*R0L

Rotate One Bit Left (Memory or Accu

mulator)

•BVS

Branch on Overflow Set

•CLC

Clear Carry Flag

•RTI

Return From Interrupt

CLD

Clear Decimal Mode

•RTS

Return From Subroutine

•CLI

Clear Interrupt Disable Bit

•SBC

Subtract Memory and Carry from Accumulator

*CLV

Clear Overflow Flag

•SEC

Set Carry Flag

•CMP

Compare Memory and Accumulator

SED

Set Decimal Mode

•CPX

Compare Memory and Index X

*SEI

Set Interrupt Disable Status

CPY

Compare Memory and Index Y

•STA

Store Accumulator in Memory

"DEC

Decrement Memory by One

*STX

Store Index X in Memory

•DEX

Decrement Index X by One

STY

Store Index Y in Memory

DEY

Decrement Index Y by One

TAX

Transfer Accumulator to Index X

*E0R

Exclusiveor Memory with Accumulator

TAY

Transfer Accumulator to Index Y

•INC

Incremeni Memory by One

*TSX

Transfer Stack Register to Index X

•INX

Incremem X by One

TXA

Transfer Index X to Accumulator

INY

Increment Y by One

*TXS

Transfer Index X to Stack Register

•JMP

Jump to New Location

TYA

Transler Index Y to Accumulator

More information on the 6500 series microprocessors is available from:

MOS Technology, Inc.

Valley Forge Corporate

Center

950 Rittenhouse Rd.

Norristown PA 19401

1-215-666-7950

I nformation on the Motorola 6800 microprocessor is available from many local distributors, and from:

Motorola Semiconductor Products Inc. Box 20912 Phoenix AZ 85036

GLOSSARY

BYTE's Board of Resident Inexperts (BRI) has ruled the following terms to be worthy of further explanation. This list is probably not complete - readers who would like further explanation of terminology are invited to write a letter to the editor identifying terms which need such treatment.

8-Bit Bidirectional Bus — a "data bus" which simultaneously transmits eight separate signals corresponding to one byte's worth of information. The bidirectional aspect means that either tristate, open collector or similar form of output stage is used, so that multiple drivers can be tied in common with only one such driver active at any time. A given board, CPU, output terminal or other logic circuit can then interface to the bus (with some addressing and master timing control intelligence) for both sending and receiving data.

Effective Address - whenever the computer's CPU addresses memory, it must send out 16 bits (for Motorola 6800, MCS 6501 or other similar chips). The way in which these 16 bits are derived can often be a fairly elaborate procedure, as well as a simple absolute expression. Whatever the method of derivation, however, the result is a 16-bit value which is used to address memory, called the effective address because it is what actually does go out to memory regardless of the details of the internal codes of the program.

Instruction Repertoire - the repertoire of a musician is the set of all pieces he or she can play well in concert. Well, the repertoire of a computer - its instructions - is the list of all the instructions it can perform and their definitions.

Subscript - in typical high order languages, a means is provided to specify elements of arrays of data.

This is done by subscripts to indicate the "nth" element for subscript "n". Use of such notation presents the problem of calculating the effective address of the actual data being referenced. In the context of evaluating a CPU, attention spent on the problem of calculating effective addresses from subscripts is very fundamental.

Time Base - whenever it is necessary to examine the relative timing of different signals, it is necessary to have a reference point and a scale for making the measurement. This is the "time base" of the reference.

TTL compatible - one of the largest families of integrated circuits is the line of "transistor-transistor logic" devices, TTL for short. A TTL compatible line of some non-TTL device can "drive" one or more TTL loads if it is an output, or can receive a TTL device's output if it is an input. There are various cautions to be observed probably worthy of a BYTE article — when different types of logic are interfaced, but the phrase "TTL compatible" usually means that the compatible device can be wired directly to TTL interconnection pins safely in at least one configuration.

Unary - this term is derived from the Latin roots of "oneness." A unary operation is an operation which has but one operand, for example the complement operation of a Motorola 6800 CPU.

62

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63

Monitor 8 V:

Your Own

Pseudo

Instructions

Monitor 8 is a program which was written by people at the now defunct Microsystems International semiconductor operation. The program was published in the MF8008 Applications Manual, 1974 Edition, Bulletin 80007, by Microsystems International, Ltd., Box 3529 Station C, Ottawa, Canada, Kl Y 4J1. I'm working at the problem of getting permission to reproduce the copyrighted materials in sections C (User's Guide) and D (Software Listing) for the benefit of the 8008 hackers in BYTE's readership. Monitor 8 is a "systems program" designed to make life easier for you by performing various little "utility" functions like editing octal data in memory, loading and dumping to cassette tape, copying data from place to place in memory, translating machine codes to mnemonics, setting and clearing break points, etc. The people who have the applications manual of MI and use Monitor 8 are usually enthusiastic about it . . . witness the following set of comments sent in by Willard I. Nico concerning use and extensions of the program as it was printed in the original manual.

I've fallen in love with "Monitor 8". The noble effort by Programmer Tom of Microsystems International has made it easier and more fun to write, edit and manipulate programs. But the Monitor can be even more fun, more enjoyable and more useful if you get inside its little head and stir things up a bit.

by

Willard I. Nico

Delta t

11020 Old Katy Road, Suite 204

Houston TX 77043

Roll Your Own Pseudo Instruction!

Say you've got a routine starting at memory location 012000 that turns on the

coffee pot at 6:00 am. Before you go to bed you type in XQT 012000 and the program is running. That's great, but if you have a lot of routines, you have to look up the proper starting address if you forget. How about just entering COF and let Monitor 8 find it for you?

What you have done is assign a mnemonic to your routine and called it with a pseudo instruction, PI for short.

What's a Pseudo Instruction?

The 8008 CPU recognizes 48 basic instructions. Counting the variations, there are 228 in all. In mnemonic form, LAB is an instruction recognized by the CPU. But you can LAC, LAD, LAE and so on, so the basic instruction is Lqr2 and the different combinations are variations of that basic instruction, (r-| or r2 can be any one of the mnemonics A, B, C, D, E, L, HorM.)

If you come up with a three-letter combination, such as DLP, that is not one of the variations recognized by the CPU, but which will cause something useful to happen, it's called a pseudo instruction. When you are running the Monitor 8 program, DLP will cause the current location pointer to be printed on your output device, and therefore it is a PI.

So how about COF? Or TKL (if you have the proper output device), or EAT, SLP, RUN? They can all be Pis if the desired program runs when you type in the mnemonic. The only restriction is that your mnemonic can't be the same

as one that is recognized by the CPU. For example, JMP would be a no-no.

How Do I Implement my Own Pseudo Instructions?

I thought you would never ask!

The first thing to do is relocate the Five Byte Table that now lives at 004021 through 004155. Since we are going to add our Pis to this table, we have to get some room and it's now hemmed in by the DPS Output routine and the Three Byte Table. I suggest you start it on a fresh page of memory. Once you start adding your own Pis you will get carried away, so leave lots of room at the end of the Table.

(The Five Byte Table is the pseudo instruction command table for Monitor 8. This table contains 5-byte groups consisting of three bytes of pseudo instruction name followed by a 2-byte pseudo instruction service routine address. There is one 5-byte group for each pseudo instruction that Monitor 8 understands. There is a psuedo instruction service routine to execute each different pseudo instruction.)

Let's assume that you choose 007000 as the starting point for your new Five Byte Table. With the Monitor 8 running, type

CPY 004021 004155 007000

handy COPY move the Table

and your Routine wil for you.

Now that the Table has been moved, we need to change the reference to its

64

location in the main program. That's easy too, thanks to Monitor 8. Type

EDT

*

003153

000

(space)

(space)

007 and your new Table is in use. Because of automatic addressing between the Three Byte Table and Five Byte Table for the HLT, RST, INP, OUT and ??? symbolic dumps, a portion of the Five Byte Table (004127 through 004155) will have to be left at the old location as well as being part of the Table at the new location. The rest of the old addresses (004021 through 004126) can be used to store any new routines you can fit in.

Add a Pseudo Instruction

Now we are ready to add a new PI to the Monitor 8 repertoire. Let's take the COF program at 012000. We add the mnemonic to the Five Byte Table, followed by the lower and then the higher addresses. I think the easiest way is with the EDT routine. Look up the octal equivalents for the letters C, 0 and F. We will add the PI to the Five Byte Table starting where the ??? is and then replace the ??? at the end of the Table. So type

EDT

*

007132

103 "C" (ASCII)

117 "O"

106 "F"

000*1 address of COF

r routine 012 J 077 "?" 077 "?" 077 "?"

Now that we have a new Table entry, we need to extend the number of entries the Five Byte Table search routine will go through before giving up and calling it a "no find".

The original Table had 022 (octal) listings, so we simply change it to 023.

EDT

*

003151 023

will take care of it nicely.

Getting Fancy

You can implement Pis for routines that need a starting and ending address just as easily. Just remember to add "200" to the high address

before recording it in the Table. As an example, suppose you want to add RUN and the routine needs to know where to run from and to. If the RUN program resides at 013000, your new Table entry would be

122 125 116 000 213

When the PI is typed in, the Monitor will respond with a *

to ask for a starting and ending address. Your RUN program can then include a call to 001023 for data at the first and each succeeding address and a call to 000362 each time around to increment the current location pointer; compare it to the desired ending address and return to the Monitor when finished.

So there you have it. A new dimension for the fine Monitor 8 program. Give it a try and I know you will like it. HPY PGM.

Gremlin Chasing

the Monitor 8

The hours spent re-coding and punching the Microsystems International "Monitor 8" software into my system have been exceptionally rewarding. To put it mildly: It's great! To Programmer Tom, wherever you are, thanks for an outstanding effort.

While using the Monitor, I found a confounding gremlin popping up inexplicably in my otherwise operational programs. Several times I tracked malfunctions down to a code that bore no resemblance to the one I had originally put there.

Sound familiar? Take heart! I have tracked the gremlin to his lair and herewith formulate the liberal dose of gremlinocide that will put him belly-up.

The problem begins with the Clear Breakpoint (CBP) routine beginning at 001353. This routine is addressed by the CBP pseudo instruction and is also called by the Set Breakpoint (SBP) routine.

Memory locations 013365, 013366 and 013367 are used as a stash for the original instruction, low address and

high address when a breakpoint is set. Before setting a new one, or when clearing the breakpoint, the instruction is replaced at the address stashed.

The Clear Breakpoint routine sets the H and L pointers at the original instruction (013365) stash and retrieves it to the E register. It then increments the L pointer to the location of the high address stash (013367) and calls the "Set H and L" routine, entering at 001027.

Theoretically, the high address is 100 to indicate a clear breakpoint. This 100 is tested by loading the D register with 100 at 001365 and exiting at 001370 if a match indicates that the breakpoint is already clear.

The problem is that the "Set H and L" routine exits with the current instruction in the A register, not the H address as the programmer anticipated. When the comparison is made with the 100 previously loaded into the D register, there will never be a match (unless the current instruction is JFC)

and the current instruction will be replaced with whatever is at 013365. You can verify this by noting the LAM instruction at 001034 after the H and L pointers have been set.

Since the random codes occurring in the memory elements at the stash location on power-up are usually high numbers, the instruction mostly gets changed in a non-existent location; but not always. That's what made it such a once-in-a-great-while goof.

Of the several ways to fix the problem, I found one that does not require any added programming steps and can be implemented nicely.

Change 001365 to load the D register with "065". Change 001370 to RFZ. Now when the instruction at the location addressed by the H and L stash is tested, nothing will change unless the instruction is Breakpoint Execute call RST 060 (code 065).

Note that instructions 001372 through 001376 can be NOP'd since they are "do nothings." -w.i.n.

65

A Versatile Read Only Memory Programmer

Volatile or non-volatile? That is the question. Should your software be set in logical concrete, or should it be input from a mass storage device such as audio tape every time you start up the system? For certain small and frequently used utility software routines, dedicating a portion of your computer's memory address space to PROM is a useful technique. Peter Helmers supplies this article on a means to overcome the most difficult hurdle of the technique - programming the PROMs themselves.

The prime candidates for PROM memory are routines to extend your microcomputer's limited instruction set in software, and that fundamental utility program - the bootstrap loader. For example, on the next home brew computer III wrap up, I have in mind a 63-byte ROM loader program which will be blown into two 8223 ROMs using this programmer. Then when I push "load" to restart the system I'll automatically go to a loop which reads in the "real" software off an audio tape cassette, then branches to the entry point of the software on completion of the load. Some of the microcomputer kit manufacturers have begun to deliver system software in ROMs using the larger mask programmable and UV-erasable PROMs. Even if you build a kit rather than a home brew system design, you may find this programmer useful when adding extra subroutines to the existing software to customize your computer.

The read only memory, or ROM, is a versatile element in digital electronics. In one case, I've been able to replace over three packages of integrated circuits with a single ROM. In addition to this, circuits designed around ROMs tend to be less cluttered; the ROM virtually forces a cleaner design. ROMs can work wonders.

For the amateur, though, ROMs are not always easy to use. Mask programmed ROMs are programmed by the manufacturer and tend to carry high setup charges. Programmable read only memories, or PROMs, are available from electronics distributors such as Hamilton-Avnet or Cramer. These distributors will also

program the PROMs that they sell. However, for the small user, the virgin PROMs not only cost more than surplus PROMs, but most distributors will also charge a one time setup charge of from $5 to $25.

The current surplus price for PROMs is about one third of the current distributor price (for an 8223 the figures are $3 surplus vs. $8.95 new). Thus the amateur whose resources are limited can save the most money by buying surplus PROMs and then programming them himself.

This article describes a circuit for a PROM programming unit for some commonly available surplus PROMs; the PROMs which can be programmed are the

8223 (32 word by 8 bits), the Schottky versions of the 8223: the 82S23 and 82S123, and the 82S26 and 82S29 (256 words by 4 bits). The programmer programs any of these PROMs one bit at a time in strict accordance to Signetics recommended specifications. It is also capable of verifying and/or examining any bit of these PROMs to ensure that they have been programmed properly (or that "surplus" doesn't mean ''preprogrammed" — but then I've received "new" PROMs from distributors that have been preprogrammed . . .). From my experience, it takes about an hour to manually program a PROM, and then verify each bit. However, to avoid

by

Peter H. Helmers

Box 6297, River Station

Rochester NY 14611

mistakes, take time and work away from disturbances.

Programming Concepts

To program a given bit in a PROM, the word address is set up on some address switches, and the bit within the addressed word is selected, using an output selector switch. As shown in Fig. 1, the circuitry involved in addressing is set up in a general manner to allow addressing of either of the two PROM organizations (e.g., either 256 x 4 or 32 x

8).

Due to lack of foresight by the PROM designers, there are three sets of programming procedures which are needed for the five types of PROMs which this programmer was designed for. However, conceptually, they all require control of three PROM parameters: the PROM voltage (ROMVcc), fusing current (If) and CE logic level. What varies is the value of these voltages and currents, and the order in which they are applied.

The timing can be represented in general as shown in Fig. 2. The effect of each control signal will be discussed separately for each of the programmi ng procedures.

8223 Programming Procedure

K1 when active corresponds to grounding (applying a logic "0") the CE

66

For software design, use of an ROM can replace volatile RAM memory for routines you always want to have around.

Fig. 1. Addressing and data input configuration for a manually controlled version of the programmer. *To be programmed.

input of the 8223. Next, when K2 is active, a fusing current is fed into the selected PROM output. This current is specified by Signetics as the current resulting from 12.5 volts applied through a 390£2 resistor to the PROM output. The final step, when K3 is active, is to raise the PROM's Vcc (pin 16) to 12.5 volts. (The circuits that control these voltages will be discussed later.)

82S23/82S123 Programming Procedure

K1 when active raises the 82S23's Vcc to 10 volts. Then, when K2 is active, a fusing current of 65 mA is applied to the selected output of the PROM. Finally, during K3, the PROM's CE input is is grounded.

82S26/82S29 Programming Procedure

The procedure for the 82S26 and 82S29 PROMs is identical to that for the

82S23 and 82S123 except that the Vcc is raised to 12.5 volts, and the fusing current is 89 mA.

Circuit Design

Basically, there are three parts to this circuit which are shown in Figs. 1, 3 and 4. Fig. 3 shows the timing sequencer which has the responsibility of developing the proper control signals required for both programming and verifying. The control is accomplished by using an 8223 PROM IC3 in connection with a state counter. (This brings up the

Fig. 3. Timing sequencer. This is the logic used to implement the timing diagram of Fig. 4 with the program of Fig. 5.

question of "which came first: the programmer or the PROM?") Referring to Fig. 5, the programmer starts out in a verify state upon powering up or after programming a bit. In this state, the 74161 state counter IC2 is cleared to zero and the counter enable

Fig. 2. "Kontrol" signals Kl, K2 and K3 — relative timing.

Kl

K2'

K3

flip flop, 7474 IC4, is cleared. Despite the fact that the 555 oscillator is producing a 2 kHz square wave, the counter is inhibited from counting because its load input is low.

At this time, as shown in Fig. 5, the PROM's CE input is held low so that the selected output may be examined by means of the "OUTPUT" indicator LED lamp.

A programming sequence is initiated by pushing the P/V push-button switch momentarily into the program (P) position. This causes the counter enable flip flop to be clocked high, allowing the state counter to

67

count. The PROM IC3 controls what happens in each state. States 1 through 4 are "do-nothing" states to allow the P/V switch to stop bouncing. These states address words 00001 through 00100 or words 10001 through 10100 of PROM IC3 depending upon the A0 input at pin 10. States 5 through 14 are then used for the programming procedure's execution.

What happens during states 5 to 14 depends upon the type of PROM being programmed, as was discussed above. Since the sequence of events is the same for the

Fig. 4. Voltage and current sources.

82S23 and 82S26 types of PROMs it can be implemented in common. Thus for these PROMs, the AO input of IC3 is tied low so that the Vcntl, FUSE, and CE control lines will be sequenced as shown in Fig. 5. In other words, the A1 through A4 inputs of IC3 are sequencing through the program in PROM storage at words 00101 through 01110.

For the 8223 PROM, the A0 input of IC3 is high so that the control lines are sequenced by the alternate program stored in words 10101 through 11110 of IC3.

However, words 01111 and 11111 of IC3 are the

/■

HEATSINK

30VDC)>

1

C5 33uF

IC6 7805A

^V

VCNTL>

1/2 75451

IRS I

IK I IC7A

ll

■ ROM VCC

RIO 220

S3C S26>''S23 9'23

^of i 7.5v m m sv m

a. Voltage source for ROMVcc.

30VDC>

C6 .33/iF

^

HEATSINK

IC8 7805B

Irn il lag i

>56 \J> >150 i i y S3B 1 ]

+ 5V

FUSE>

same so that the following action is taken in state 15 (regardless of type of PROM). In this state, the STOP output of IC3 is low so that the counter enable flip flop is cleared, and the state counter is reset to state 0 on the next clock pulse. Since the load line is held low, the state counter will stay in this state until IC4 is clocked high when another bit is to be programmed.

Fig. 4 shows the voltage and current sources that generate the programming signals detailed above. There are two aspects to the control of these sources: type of PROM, and the control signals from the state sequencer.

The basic voltage source is shown in Fig. 6. This circuit can be modified by using a transistor switch to selectively short out the zener diode. Thus when the zener is shorted, the output voltage will be 5 volts; when the zener is not shorted, the output will be the sum of the zener voltage and the regulator's normal 5 volt output. Referring to Fig. 4(a), the transistor switch is

RI2 >RI3 >RI5 50 <I60 <220

RI6 390

RI4

IBOfl

VW o+5V

TO ROM OUTPUT SELECTOR

b. Current source for If routed to PROM outputs via S2.

contained in IC7a. Thus when Vcntl is low, the transistor conducts so that the value of ROMVcc is 5 volts. When Vcntl is high the transistor doesn't conduct so that the ROMVcc voltage is increased to either 10 volts or 12.5 volts depending on which zener is switched into the circuit by S3c (which depends on the type of PROM to be programmed).

The basic current source is shown in Fig. 7. Note that a zener diode is required to limit the voltage developed at the ground pin of the regulator. This diode is used to protect the PROM being programmed. Because the zener protection voltage and the value of the fusing current varies for the different PROMs, switches S3a and S3b select the Vp and If values required. But the 8223 requires a current defined by 12.5 volts supplied through a 390 Ohm resistor. Thus switches S3a and S3b also switch circuit into the voltage source configuration discussed above. Switch S3e then selects the fusing current from either the output of the current source circuit configuration, or from the 390 Ohm resistor required for the 8223.

IC7b, which is controlled by the FUSE signal, is used to route the fusing current. If FUSE is low, the transistor in IC7b will conduct so that no current is applied to the selected PROM output. When FUSE is high, the transistor won't conduct so that programming can occur.

Fig. 1 shows the addressing circuitry for the programmer and requires no further comment.

Construction

The prototype (which was designed and constructed in a period of about 28 hours) was built using wire wrap techniques. All discrete components were soldered

68

into DIP headers so that wiring could be done to wire wrap sockets for these parts as well. The board layout that was used is shown in Fig. 8. There are two items which should be noted. Be sure to use heatsinks for the voltage regulator ICs since they have to dissipate a lot of power (due to the use of a single 30 volt unregulated supply).

The front panel of the programmer was arranged as shown in Fig. 9. Thus most of the switch wiring was done on the front panel, and interconnection to the wire wrapped circuit board was accomplished by using two plugs made from DIP headers. About 12 inches of wire was used for these interconnects. It is also advisable to include several ground wires to decrease noise.

Note that this design requires the use of a preprogrammed PROM (e.g., IC3: an 8223). This PROM must be programmed according to the truth table of Fig. 10. Probably the easiest way to get this PROM is to take advantage of the offers of the various surplus PROM sellers which advertise in BYTE and other magazines, and have them program this "bootstrap" PROM. Their prices tend to be reasonable — especially since this is the last time you'll have to pay to have a PROM programmed.

Before programming your first PROM, a single adjustment is required. This entails setting potentiometer P1 so that the NE555's clock

Fig. 5. Timing diagram of the sequencer. This is a synchronous timing generator illustrating one use of ROM logic. The relative timing is built into the ROM program of 8223 IC3 — with a master control of the rate set by the clock of 555 IC1.

555

PIN3

7474 PIN 3

7474 PIN 5

onnjiJinjinjijijTjijiJiJiiifT^

IT

~L^

FOR 82S23.82S26;

CE

VCNTL

FUSE

CE STATE

^_

_n_

COUNTER =001 2 3 4 5 6 7 8 9 10 II 12 13 14 15 O STATES——-r4-T4-DEB0UNCE-4- PROGRAM SEQUENCE

L-VER

START ERIFY

V CNTL = 0=5>R0M VCC=+5V

—rrrr

STOP—1 ! VERIFY—'

FUSE = 0=J> if = 0

VCNTL -l=> R0MVCC =

frequency is 2 kHz. However, this setting is not critical so that if you don't have any means of measuring frequency, just set the pot near its maximum resistance setting (so that a frequency < 2 kHz is obtained).

Operation

1. Turn on: Place the PROM in the proper socket. Plug the programmer into a 110 volt socket (note that capacitors C3 and C4 are used to initialize the programmer

+ I0V-82S23 FUSE" l=> if = -TS5mA 82S23

+ I2.5V82S26.8223

to state 0 so that no spurious bits will be programmed). Observe that the POWER LED is lit up.

2. Address Setup: The programmer verifies and/or programs only one bit of a PROM at a time. The word address is set by switches labeled AO through A7 (but only switches AO through A4 are used for the 32x8 PROMs; switches A5 through A7 are not electrically

B9mA 82S26 12.5V THRU 390 OHMS FOR 8223

connected to the socket for these PROMs). The bit within the addressed word is selected by the output selector switch. (But outputs Q4 through Q7 are not electrically connected for the 256x4 PROMs).

3. Verify/Program: By default (of de operator . ..?), the LED labeled OUTPUT indicates the status of the selected output of the addressed word. This LED is on if the bit is a logical "1" (e.g.,

Fig. 6. Voltage pedestal technique using a 5 V regulator JC.

30VDCO

5V REG

IN IC OUT GND

R BIAS=*220H

V0UT= 5 + VZ

Fig. 7. Current source implemented with a 5 V regulator IC.

30VDCO

5VREG N IC OUT GND

PROTECTS FROM VOLTAGE OVERSHOOTS

69

Fig. 8. Wire wrap board layout. *Mounted on heatsinks.

ROMs are not the "universal" logic elements that some people tend to consider them. Used correctly in logic designs, they can benefit a given design; used improperly they can cause never ending grievances.

>~2.4 volts), and is off if the bit is a logical "0" (e.g., <~.8 volts). Since the PROMs for this programmer come (hopefully . . .) with "0"s in every bit, programming involves selective fusing of "1"s in given bits. The fusing process is accomplished by pressing the PROGRAM/ VERIFY switch towards the PROGRAM position, and then releasing the switch. The OUTPUT LED should then be on, to verify that the bit has been programmed. If it doesn't fuse, a second attempt can be made. However PROMs have a reputation of less than perfect fabrication — one brand new PROM that I encountered required a fusing current duration of close to 4 seconds for one output; I

Fig. 9. Front panel layout.

7805A* ROM VCC

7805B* FUSE CURRENT

7805C* + 5 VOLTS

DISC2

DISCRETE

COMPONENTS

DISCI DISCRETE COMPONENTS IN DIP HEADER

I 7545I I NE555

I I

■d

pi

DISC 3

DISCRETE

COMPONENTS

74I6I

ICNI

INTERCONNECT PLUG FROM FRONT PANEL

F U S

E

7474

8223

ICN2

INTERCONNECT PLUG FROM FRONT PANEL

now use that PROM to test out new PROM programmer designs.

Final Thoughts

ROMs are great devices, and now the amateur can easily experiment with them. However my experience has been that ROMs are not the "universal" logic elements that some people tend to consider them. Used correctly in logic designs, they can benefit a given design; used improperly they can cause never ending grievances.

As a means to turn software into "firmware" the only problem with an ROM technique is making sure your program is debugged before you blow those irreplaceable fusible links inside the PROM package.

••••••••

256X4PR0MS

PROM SOCKETS

©

POWER

ADDRESS

<3 <g <q <3 <g <8 <&

AO Al A2 A3 A4 A5 A6

Extensions and Modifications

The PROM programmer as originally designed and described in this article is set up for a fairly tedious hand-operated te elm iq ue. This technique is appropriate for occasional use, but is hardly a cceptable for extensive programming. An extension which could easily be made is to replace the manual switches Sib, S2 and S3 with banks of surplus reed relays driven from TTL gates, replace Sla with a clock pulse derived from your computer, and replace the address switches with the outputs of

Fig. 10. Table of PROM bits to be "blown" to implement the program in IC3. A similar table should be made for each PROM which is to be programmed for general use once the programmer has been built.

ADDRESS Ao A4

Q1 STOP

Q2 Q3

Vcntl

Q4 CE

Q5 Q6 FUSE

00000

1

00001

00000

00001

1

00010

1

00011

1

00100

1

00101

1

00110

1

00111

1

1

01000

1

1

01001

1

01010

1

01011

1

01100

1

1

01101

1

01110

1

01111

1

10000

10001

1

10010

1

10011

1

10100

1

10101

10110

10111

1

11000

1

11001

1

1

11010

1

1

11011

1

1

11100

1

11101

11110

11111

1

Q7

Q8

70

an H-bit latch set by the computers data bus. As inputs to the computer you'd supply the logic I/logic 0 verify information provided by the LED indicator as well as a "programmer busy" signal derived from the "Counter Enable" line of IC4 pin 5. Put it all together with software to move data from

PARTS LIST

R1, R2, 1k J4W10%

R3, R4, 1 k V. W 10%

R6. R7, 1k'/4 W10%

R8, R9, 1 k % W 10%

R5, R14 180fi'/a W10%

R10, R15 220i2 % W 10%

R11 56J2% W 10%

R12 150£2y«W 10%

R13 160fiy4W 5%

R16 390ft'/«W 10%

P1 100k trim pot

C1 .15uF

C2, C3. C4.05uF

C5, C6.33uF

C7 3300 mF 50 V electrolytic

IC1 NE555

IC2 74161

IC3 8223 (programmed as per

Fig. 5)

IC4 7474

main memory to the PROM and verify the results automatically, and you'll have a project to extend this design. Such a PROM programmer would be a good idea as a local computer club project since burning PROM programs is likely to be of common interest to many members.

IC5, IC6, IC8 780S (5 V regulator

-TO220case)

IC7 75451

LED1, LED2 any common LED

51 DPDT push-button

52 SP8T rotary

53 5P3T rotary S4*S11 SPDT toggle

Z1, Z5 7.5 V zener diode 1 N4737

1 W

Z2 5 V, 1 W zener 1N4733

Z3 22 V, 1 W zener 1 N4748

Z4 16V, 1 W zener 1N4745

T1 24 V ac transformer, 300 mA

FWB full wave bridge rectifier 50

piv, 1 Amp

Misc:

% A fuse and holder

line cord

heatsink for 7805s

chassis

DELTA t

I 8

A

Track incremental data recorder/player 330 Steps per second (2640 baud) ■ READ and WRITE forward or reverse ■ 83 1/3 Bytes per inch record density I Parallel data input and output ■ Quick change tape cartridge ■ EOT and BOT photo sensors

WRITE FOR DESCRIPTIVE LITERATURE

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PAPER TAPE READER

TELETEPJMIIMAL

flu reader 30

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(kit)

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FEATURES:

• 0 to 300 character per second bi-directional reading speeds.

Single 5 volt, 2 amp power requirement. Reads any one inch, 8 level paper tape. Reads any tape material with less than 60% transmissivity (oiled yellow paper). Stepper motor drive - one moving part. Spring loaded line filament lamp with 15,000 hour life.

• Self-cleaning read head.

• TTL interface, mates with most micro computers.

• Mounts in 4-3/8"H x 4-1/4"W panel cutout extends 2-1/2" behind and in front of the panel.

PRICES:

• Fly Reader 30 Kit (only main PC $295 board requires assembly)

• Fly Reader 30 (assembled and tested) $365

• Optional fan fold trays (200' capacity) mounted on 19"Wx7"H

rack panel $110

• Optional 19"Wx5-1/4"H rack panel mounting $ 25

• Optional 5/8 level tape gate for reading both 5 and 8 level tapes $ 25

TERMS:

• Net 30 days for rated firms.

• Cash with order or master charge plus $3 shipping for individuals within continental U.S.A.

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IE CAMBRIDGE STREET

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71

/

BYTER's DIGEST

tt

You Wouldn't Want To Be Without One of These

Did you ever wonder how to tap the pins of an integrated circuit mounted on a PC board — but without shorting two pins or losing grip with the clips? This photo illustrates a very useful hardware debugging tool for kit builders — Continental Specialties Corporation's "Proto Clip" in operation grabbing an integrated circuit and providing test points for probes. According to their

latest catalog brochure this clip sells for $4.75 in a 1 6-pin DIP version.

The tool works best with

1

LS?

L3

« CO

L

L

1 1 1 1

L L

1 ■ 1 1 1 ■

L L

IIIIIIIIII

1

LLLI "S

.LLLLLL

LLLLLLLLLL

Li".

Jc

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L

1

GAf'i£"o

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L .LLLLLL

I

L LLLLLLLLLL

ii

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L :;:

L-.-J

OftiME:.;

L

L L

L L L

L L

i: ft \

ICs that have been soldered into a PC board as is often the case with both kit and manufactured products. The test probe can be attached to the extended pins for "live" monitoring of signals. The same people make a variation called "Proto Clip Cables" which start at $7.50 and come with lengths of ribbon cable pre-attached. For full details write Continental Specialties Corp., 44 Kendall St., New Haven CT 06512 or use the reader service page of BYTE.

What Distributors Can Do for the Microcomputer Hacker

One source of the parts you can use in making your own home brew microcomputer system is the traditional electronics wholesaler. An example of one such wholesaler's product which may be of interest to some BYTE readers is the recently announced line of Cramerkit products. These products, distributed by Cramer Electronics Inc., main office 85 Wells Ave., Newton MA 02159, are packages of semiconductors and documentation which were designed and prepared by Microcomputer Technique Inc. under the direction of Jerry Ogden. I called C. L. Grant, manager of marketing services for Cramer, after he sent me a package of materials on the kits in late August. While Cramer is not really aiming the package at the amateur market, I did confirm that Cramer will sell the kits to individuals who order it and present $495. They are not intending to give out quantity orders of this package.

cramer

What To Do With a TV Display .. .

Here is one example of what to do with a TV typewriter style display hooked up to a computer. Jim Fry, PO Box 6585,Toledo OH 43612, sends us this picture taken of the face of his TV, driven by a TV-typewriter/8008 CPU combination. The display is a representation (using ASCII characters) of a simple program bringing to mind a game of Tic-Tac-Toe. The

program is doing what computers do best — acting as a bookkeeper for two players sitting at the keyboard. A bit of artificial intelligence work is required to produce the classical computer which plays against the human opponent — a much more complicated program. The numbers of the game's positions are used for inputting the information on moves — the players simply type a number from 1 to 9 for an unoccupied square. This picture illustrates the board at the start of a game.

72

The kits come in versions oriented towards the different microprocessors for which Cramer has a franchise. The presently available kits arc centered around the Tl TMS-8080, the Intel 8080A, and the Motorola 6800 machines. Cramer plans future products in this line for the RCA COSMAC, MOSTEK F8 and AMD 9080 chips. In each case, the kits come with comp lete engineering support documentation, information which is likely to be of interest to the serious microcomputer enthusiast. In addition to the documentation, the kits are said to contain the following items:

— The microprocessor IC itself. -1kby8bitsof RAM.

— Ik by 8 bits of ROM in UV-erasable form, with a pre-programmed system monitor which provides a software front panel function.

— Four input and four output ports with complete parts requirements.

— Support circuitry including clocks, buffering, control, memory decode, etc.

— Controls and displays with enough parts for a hexadecimal LED front panel arrangement.

— Audio tape interface and a cassette filled with "useful programs."

It looks like a real product for the person who builds from the ground up. It is not a computer kit in the conventional sense of a MITS, Godbout or Southwest Tech product, but then it doesn't constrain you to a fixed wiring layout and system design either. You'll almost certainly need a wirewrap gun and lots of #30 wire to put this one together — or you could buy the PC board sets furnished by hobby suppl iers li ke Southwest Technical

8800 SOFTWARE!

WE HAVE ALTAIR COMPATIBLE 8080 SOFTWARE AND FIRMWARE MODULES!

If you haven't used our Assembly Language Operating System you have been missing a wonderful experience. We have found the ALOS Resident Editor and Assembler to he an extremely useful and powerful program development tool. We are so sure you will be turned on with our Software Package No. 1 that we are practically giving a listing away for a mere S3.00US. Yes, this is a source listing as well as a hexidecimal printout.

The Assembly Language Operating System gives you the ability to write programs in 8080 Assembly Language with labels, expressions and comments. The programs can then be edited by line number, a powerful feature that makes corrections and additions very easy. The program can be named as a file and stored at a user selected memory location while another file is being worked on. Files can be listed by line number using the LIST command before being assembled. The Assembler converts the Assembly Language mnemonic codes and labels to hexidecimal op-codes at any address selected by the user to run at any address (the run address may be different from the location in memory where the program is placed). Assembly can be performed with or without error messages being printed. After assembly the program can be run using the KXIiCUTE command or dumped onto cassette or paper tape using the DUMP command.

Paper tapes or cassettes of the program listing will not be available to individuals but we have already sent paper tapes to several computer clubs around the country. We suggest you contact one of the clubs if you want a copy of the tape or need assistance. We will be happy to send tape copies to any bona fide "amateur" computer club or society, so if you are a member of such a group, please let us know of your group's existence by sending us a copy of its latest newsletter.

In addition we have a manual describing the use of the ALO System from the ground up. This will include a complete description with examples of every command, instructions on the use of all internal routines by other programs and an overview of efficient file generation and handling.

An even more wonderful version of (he ALOS is available in firmware as part of an 8K PROM module. The expanded version allows dynamic Input/Output allocation, file area management by the executive, octal and/or hex data entry, loaders for both 8800 BASIC and Intel Ilex Formal tapes, and many other capabilities not included in the original Package No. 1. The basic Resident Executive-liditor-Assembler occupies about 4K of the 8K maximum capacity. So why the 8K?7 Because we are leaving space for future expansion. The first expansion is a powerful Simulator that adds-on to the basic ALOS package.

SIMULATOR?? Yes, an Interpretive Simulator which runs 8080 programs on the same 8080 that contains the Simulator! Not just traps and breakpoints but simulated I/O, registers, flags, program counter and stack pointer. Any of these can be modified at all times; plus a single step mode that displays all the registers, pointers, flags, etc., after execution of each instruction. This Simulator is the most powerful debugging tool for the 8080 that we know of. Just think, you will hardly ever again have to touch the front panel switches.

Both versions of our ALOS require 2K bytes of RAM for system internal storage and symbol tables. In addition at least 4K more is needed to hold user files, although greater capabilities are achieved with 8K or 12K of user space.

PTCOS!

What is PTCOS you may ask?? It stands for Processor Technology Cassette Operating System and it means a real Operating System program based around our CDS-VIM dual Cassette Data transport System. When operating under this program you have true file handling power to create, delete, edit, relocate, and copy all kinds of files (e.g. BASIC and programs written in BASIC). PTCOS can handle multiple I/O devices using a special type of file and suitable small driving routines. At last an integrated system concept for the 8800 is a reality! PTCOS is devilishly similar in its basic operation to an FDOS and is upward compatible with future software developments from Processor Technology.

PRICE LISTeffecitve OCT. I, 1975

KIT ASSEMBLED DELIVERY

Software package No. 1 Assembly Language Operating System

PTCOS: Processor Technology Cassette Operating System

ALS-8 PROM Firmware module expanded version of SP No. I

SIM-1 PROM Firmware add-on to ALS-8: Simulator section

S3.00

WRITE

3 weeks max.

December '75

S Processor Technology 2465 Fourth Street Berkeley,Ca.94710

(415) 549-0857

S325. 3 weeks

$110. 3 weeks

Products. The $495 price is essentially for the semiconductors and documentation alone — the price does not include power supply, case or any packaging.

. . .CARL

The Newest Profession

"Computer hardware WIZARD is being sought for a new computer research lab at the University of Rochester.'' Further professional qualifications —

must speak 6th century Arabic dialects, be able to compute Aexadecimally, be able to zap gates, exorcise memory, burn ROMs with saltpeter and brimstone, and other related minor skills. Submitted by A. M. Biguity

73

ALL WE CAN TELL YOU IS

THAT MEN WHO DOMT SMOKE

LIVE ABOUT 6 YEARS LONGER THAN MEN WHO

DO SMOKE

If you want someone to help you

stop smoking cigarettes,

contact your American Cancer Society.

*

AMERICAN CANCER SOCIETY

This fact taken from a research study is based on the smoker who at age 25 smokes about a pack and a half of cigarettes a day.

8800 HARDWARE!

V\fe have Altair compatible plug-in peripherals!

BUILD A SMART TERMINAL INTO YOUR

ALTAIR! Your Altair

already has the intelligence, we provide the display module. This module is not a limitied "TV Typewriter" but an ultra-high speed computer terminal built into your computer. The VDM-I generates sixteen 64 character lines from data stored in the IK byte on-card memory. Alphnumeric data is shown in a 7x9 dot matrix format with a full 128 upper and lower case ASCII character set. The VDM-1 features EIA video output for any standard video monitor, multiple programmable cursors, automatic text scrolling and powerful lest editing software included FREE! Available now.

!! MASS STORAGE !! We have always wanted a low cost, reliable, fast access storage device using standard Phillips cassettes (we bet you have too), so we got to work and designed one here it is! With the CDS-VTIl Cassette Data System you have computer controlled access to 128K bytes of data within 20 seconds when using C-30 cassettes. We provide read/write electronics and transport controller. Altair interface, a case and power supply, and one or two multiple motor cassette transports plus FREE driving software! Yes, up to two cassette drives! Two drives provide much more powerful file handling and copying capabilities as well as, of course, twice the storage capacity. Data can be written and/or read asynchronously at any transfer rate up to 150 bytes/sec: at this rate 8K BASIC can be loaded in about 50 seconds! We have also included provision for use of any read/write electronic plug-in section so that tapes using 111 I. Computer Hobbyist or Digital Croup formats may be read at lower data rates. Available in November 1975.

4KRA Static Read/Write Memory This 40% word STATIC memory provides faster, more reliable and less expensive operation than any currently available dynamic memory system. The 4KRA permits Altair 8800 operation at absolute top speed continuously. All RAM's (Random Access Memories) used in the 4KRA are 9IL02A's by Advanced Micro Devices, the best commercial memory IC on the market today. 91 L02A's require typically 1/3 the power of standard 2102 or 8101 type RAM's and each one is manufactured to military specification MIL STD-883 for extremely high reliability. These memories can be operated from a battery backup supply in case of power failure with very low standby power consumption. (Ask for our technical bulletin TB-101 on power down operation.) In short we have done everything we could to make the best 4K memory module in the computer field, and because we buy in large quantity, we can make it for a very reasonable price. Available now.

2KRO Erasable Reprogrammable Read Only Memory Module

With this module the Altair 8800 can use 1702A or 5203 type Erasable Reprogrammable ROM's. The'2KRO accepts up to eight of these IC's for a capacity of 2048 eight bit words. Once programmed this module will hold its data indefinitely whether or not power is on. This feature is extremely useful when developing software. All necessary bus interfacing logic and regulated supplies are provided but NOT the EPROM IC's. Both 1702A and 5203 PROM's are available from other advertisers in this magazine for well under S25. Available now.

3P+S Input/Output Module

Just one 3P+S card will fulfill the Input/Output needs of most 8800 users. There are two 8-bil parallel input and output ports with full handshaking logic. There is also a serial I/O using a UART with both teletype current loop and EIA RS-232 standard interfaces provided. The serial data rate can be set under software control between 35 and 4600 Baud. You can use your old model 19 TTY! This module gives you all the electronics you need to interface most peripheral devices with the Altair 8800, it's really the most useful and versatile I/O we've seen for any computer. Available now.

MB-1 Mother Board

Don't worry any more about wiring hundreds of wires in your Altair to expand the mainframe. Our single piece 1/8-inch thick, rugged mother board can be installed as one single replacement for either three or four 88EC Expander cards, so you don't have to replace your already installed 88EC card if you don't want to. The MB-I has very heavy power and ground busses and comes with a piece of flat ribbon cable for connection to the front panel board of the 8800, a built-in bus terminator, and card guide cage for sixteen plug-in slots. Available now.

PRICE LIST effective Oct. I, 1975 Item Kit Assembled Delivery

$75. 3 weeks max. 165. 3 weeks max.

2KRO EPROM module S 50 3P+S I/O module 125,

4KRA-2 RAM module w/

2048 8-bil words WRITE FOR DETAILS

4KRA-4 RAM module w/

4096 8-bit words WRITE FOR DETAILS

RAM only, AMD91L02A

500 usee, LOW POWER 8/S40. 3 weeks max

CDS-VIII-1 Cassette Data

System w/one transport WRITE FOR DETAILS CDS-VII1-2 w/lwo transports

MB-1 Mother board, bus terminator, card cage VDM-1 Video Display module

WR1TI-: FOR DETAILS

70. 3 weeks max.

160. 225. 3 weeks max.

TERMS: All items postpaid if full payment accompanies order. COD orders must include 25$ deposit. MasterCharge gladly accepted, but please send us an order with your signature on it.

DISCOUNTS: Orders over $375 may subtract 5%; orders over $600 may subtract 10%.

E Processor Technology 2465 Fourth Street Berkeley,Ca.947K>

(415) 549-0857

75

Thank youl

suramin *»»«

1J1Y

would like to take this opportunity to say "Thanks" to all our many customers and friends for a very gratifying (and profitable) year. We've offered some outstanding bargains; you've gained the benefit of our Hi-volume purchasing power. We couldn't offer these state-of-the-art products at such low prices if you did not recognize them for the truly outstanding opportunities they are. We'll continue to bring newer and better items to the hobbyist and experimenter market just as long as you continue to respond as you have in the past. We have big plans for our future product line. Included in our planning are kits for all of the interface modules used in CPU to outside world applications (UARTS, Code converters, Keyboard ROMs, PROMs, RAMs, Printer drivers, CRT modems, baudot rate generators, counters, timers, and on and on). Watch for our announcement of new products in BYTE in the coming months.

Now, since this is the Holiday Season, with gift lists to fill and projects to plan and get started, here is our gift to you.

ITEM 101 — 709 Op Amp in T0-5 pkg. Brand new and unconditionally guaranteed $ .19 ea

ITEM 201 — KR2376 Keyboard RAM — Brand new (Not a factory reject or floor sweeping.) Will generate standard ASCII code (up to nine bits) with SPST Switch closure for each alphanumeric. Completely self-contained data sheets with each unit $4.95 ea

ITEM 301 - 1N4448 Silicon Diode (or equiv) 100PIV - 10 mA like a 1N914 only better $ .05 ea

ITEM 401 - UARTCOM2502/2017 in 40 pin dip pkg. Advertised elsewhere for $14.95. This is

an untested HOBBY grade chip for experimentation and use $4.95 ea

ITEM 501 - 2N3859 equiv. Silicon NPN general purpose transistor. Used for switching, LED

driver, oscillators, amplifiers, etc. Small plastic $ .10 ea

All items ppd. Please ADD $1.00 per order to cover handling costs. Orders shipped same day in most cases. $5.00 - minimum order.

suramin

fimiipiim

6 KING RICHARD DRIVE, LONDONDERRY, N.H. 03053 603-04- 4644

76

Clubs and Newsletters

The Evolution of the Homebrew Computer Club

BYTE has received the latest issue of the Homebrew Computer Club Newsletter, now edited by Robert Reiling, 193 Thompson Sq., Mountain View CA 94043. This club was started with a meeting on March 5, 1975, assembled by founders Fred Moore and Gordon French. Fred has been pretty much running the show since then via the newsletter activity. However, Fred's personal plans took him to the Washington DC area in the middle of August so he had to pass the ball along to someone else in the Silicon Valley. According to the newsletter dated Aug. 20, 1975, the following persons are now working on the club and newsletter:

• Robert Reiling, editor.

• John Schulein, technical editor.

• Tom Pittman, mailing list.

• Lenny Shuster, meeting room.

• Ray Boaz, treasurer.

The Aug. 20 issue is nicely done in a very professional photo offset format. It includes notes by John Schulein and Tom Pittman on the problem of audio cassette recording standards. (See BYTE's conference announcement elsewhere in this issue for some additional inputs.) The issue also includes comments by Ken McGinnis on TV display timing for the computer hobbyist, and some random data of interest compiled by Robert Reiling. The Homebrew Computer Club meets every two weeks at the Stanford Linear Accelerator Center, usually in the auditorium. Ask a guard for directions when you get there. Extrapolating the every two week algorithm from known dates of Aug. 20 and Sept. 3 gives the following dates in October and November: Oct. 1, 15, 29; Nov. 12, 26. The address for correspondence is temporarily Robert Reiling's site, but arrangements are being made for a club post office box.

HP-65 Users Club

The HP-65 is probably the one "home computer" in widest circulation by now. This is certainly true if your definition of "home computer" is something which costs under $1000, has p ro gra m m ability, uses microcomputer technology, has off-line storage, and some form of interactive set of user controls and displays.

The HP-65 Users Club is an organization founded by Richard J. Nelson (2541 W. Camden PI., Santa Ana CA 92704) and devoted to the use of the HP-65, and other programmable calculators. The club publishes a newsletter, 65 Notes, for a nominal fee. The July 1975 issue (Volume 2 number 6) is typical of the many issues included in a sample packet forwarded by Richard: a feature on the new HP-25, comments on the formation of various local club chapters, several programs, an article on repairs and/or modifications of the HP-65, and an article on how one reader of 65 Notes adapted his HP-65 to a hard copy printer. (Note: 65 Notes and the HP-25 Users Club are in no way affiliated with Hewlett Packard.) Here is where to turn for a wealth of information on programmable hand-held calculators. Beta Iota Tau

R i chard A . Petke announces formation of Beta lota Tau, a new fraternity for campus computer freaks, knurds, hackers and assorted hangers on. For a full description see the letters section of this issue. His address:

BETA IOTA TAU c/o Richard A. Petke R.H.I.T. Box 520 Terre Haute IN 47803 If you want a definition of the terms "knurd," "hacker" and "computer freak," either look into a mirror or get in touch with Mr. Petke!

North Texas No-Name Club

The second informal gathering of the North Texas No-name Computer Club took place at the Irving Library on August 18.

Bill Fuller gave a short introduction on what the club's general aims could be and a few reasons for forming a group. With this, each of the 16 attendees introduced themselves, and summarized their computer interests and general background.

Lannie Walker, the Ft. Worth co-founder, brought his Martin MK-2 to display. Greg Walker demonstrated operation of his TVT-II. Ric Martin provided his TVT-I for comparison. Also available for a "look-see" were a Processor Technology In/Out board, ECS modem, two Suding cassette interfaces, ECS digital display PC board, and the MITS VLCT PC boards.

With i n tro duct ions complete, a general open forum discussion took place until we were kicked out of the library at 9 pm. The "meeting" continued at a local coffee shop until 11:30 pm.

A quick summary of pertinent data obtained from questionnaires filled out shows:

Computer: Five Altairs, one

MK-2 and one home brew.

TVT: One TVT-I and two

TVT-II.

Cassette interface: Three

Suding, one ECS, one

Computer Hobbyist, one

MITS.

Paper Tape: Three punches,

one reader.

Teletype: Five of various

vintage. Since we are still somewhat unstructured as a formal club, interested "byters" should contact Bill Fuller, 2377 Dalworth 157, Grand Prairie TX 75050, 1-214-264-0111 or Lannie Walker, Route 1, Box 272, A I e d o TX 7 6008, 1-817-244-1013.

77

WORLD'S FIRST COMPUTER STORE

IISSS

H

Fir 1

MITS-MOBILE HITS SE P ^

Altair User's Group

In the words of The Agency, MITS' advertising subsidiary, "The Altair User's Group is quite possibly the largest hobbyist organization in the world. It is both a means of communication among Altair users and a method of building a comprehensive library of Altair programs .. . among other benefits, you will receive a subscription to the monthly publication Computer Notes, which contains complete update information on Altair hardware and software developments, programming tips, general computer articles and other useful information." And that's a pretty fair statement, judging from the August 75 issue of Computer Notes.

Edited by Dave Bunnell, the head of The Agency, Computer Notes covers most items of interest to Altair users. The August edition is headlined "WORLD'S FIRST COMPUTER STORE," featuring an article on The Computer Store, located in West Los Angeles, which is apparently the first retail store solely for computers and computer supplies (shades of Arthur's

Information Parlor). The store sells Altairs over the counter of course, and functions as a general computer hobbyist gathering place and information center. Computer Notes also features a travelogue of the MITS-MOBILE Altair Caravan, which toured the Southeast during August and September.

In his editorial, Dave Bunnell leads a good deal of rumors to their proper resting places, covering "off brand peripherals, memory cards, etc.", the false rumors concerning "less than full spec" Intel 8080 chips, software agreement tec hnicalities, M ITS' development of a Motorola 6800 system, and delivery complaints. Dave precedes all this with the explanation, "One point that has gotten us good press in a number of publications is that we try and level with our customers." From Dave's straightforward presentation, I think they deserve another "good press."

There are no surprises in the rest of the newsletter, with its "Altair Service Dept.," "Letters to the Editor," "HARDWARE," and "SOFTWARE" sections. In "HARDWARE" Tom Durston and Paul van Baalcn deliver some ACR (Audio Cassette Recording) hardware alignment updates, fixes for 8800 problems, some "Boo Boos," various maintenance techniques and hardware specifications.

The "SOFTWARE" section contains "Software Contest Winners Announced" by Bill Gates; "Q & A" on the "Monitor, Editor and Assembler'' by Paul Wasmund, the author of these software components; "General Software" by Paul Allen, the director of MITS' Software Depart..lent, answers various questions concerning MITS' software performance, policies and

future plans; Monte Davidoff, one of the authors of Altair BASIC, illustrates the string handling and recursive subroutine capabilities of BASIC in "Fun with Altair BASIC."

Monte does a good job of describing these interesting possibilities of BASIC, even though such applications can be a bit strenuous for both the reader and the BASIC language itself, as witnessed by Monte's closing comment on factorial computation: "If confusion still prevails, do not worry about it."

Bill Gates, in his article "Software Hints for 8800," gives just that. Mentioning some of the reasons for the 8080's power, Bill goes on to discuss binary coded decimal (BCD) arithmetic, giving a sample routine for conversion from BCD to binary. After a short lesson on special short branching ("skip") techniques the reader is presented with some neat but fairly general stack usage tips. Bill doesn't waste words in his article; a rank beginner would probably be left far behind by these last concise hints.

In a short review, Dave Bunnell gives BYTE an A+ for format and an A— for content ("They have something to work for."). Although it sounds a little

like an ad for BYTE, Dave is pleasantly positive in his remarks.

I have a couple of complaints. The format of Computer Notes is imaginatively done, but at some points the text is hard to follow — you don't know what to read next. (But then, it is only fair to point out that BYTE may suffer the same malaise in one or two places . . . Carl) Also, a lot is assumed on the part of the reader. I realize that any such newsletter can't function as a tutorial publication (that is a major part of BYTE's job) but the "HARDWARE" and "SOFTWARE" sections would certainly throw any real beginner. But I judge too harshly: Computer Notes is truly a good bulletin for the users of Altair equipment.

To paraphrase Dave's closing question in his BYTE review, is the Altair User's Group something no Altair computer hobbyist should be without? At this point in time, I would have to say that he has no choice since membership is automatic for Altair owners. Should the Altair computer hobbyist be thankful for Computer Notes and other benefits of the User's Group? I would have to say yes.

. . . Chris Ryland

DIAGNOSTICS

Debugging is the art of removing bugs. Many times, bugs in programs are only uncovered after the program is executed — and on larger machines "diagnostics" often tell what

BYTE #2, p. 15, fourth column, Kluge Harp. The formula for the well tempered scale ratios was "squashed" a bit, and should read:

(ln(137)+ n ln(2)/12)

happened. Well, a magazine is like a computer program — large and complex. Here is some centralized documentation of known bugs in BYTE detected in the execution of previous issues.

BYTE #2, p. 16, first column, Kluge Harp. The formula for the timer interval is incorrectly printed. It should read:

Lcn = time / (oh + dt pcn)

The "#' deleted.

symbol should be

78

BYTE #2, p. 36 LIFE Line 2, Fig. 3. The variable DONE is incorrectly described.

Correct description:

DONE - the variable set by KEYBOARD_INTERPRETER after a user command to end execution.

BYTE #2, p. 38, LIFE Line 2, Fig. 6. The variables NCMAX, NCMIN, NRMAX, and NRMIN are incorrectly classified as local — used only by GENERATION. They should have been classified as shared with the whole program, i.e., global.

BYTE #1, p. 54, Fig. 5, Write Your Own Assembler. Dan Fylstra caught a bug in his 8080 example about the day after BYTE #1 went to press — and several readers (including Bill Gates of MITS Altair BASIC fame see letters) caught it. The mistake is that branch table has 3 bytes per entry and the example multiplies by 2 with a left shift (RLC).The corrected code would be:

'•NEXT TOKEN" ROUTINE LXI H,BRTAB H - branch table base

LDAX D get translated char from line

BYTE #1, p. 16. Author James Hogenson supplies the following correction to information on the RGS-008A computer:

The two LEDs not used by the upper memory address are not used to indicate the second and third bytes of a two or three byte instruction. They indicate the control code which varies in a two or three byte instruction. One machine cycle is required for each byte of an instruction. The first byte of an instruction is always an instruction fetch cycle indicated by control code 0. The second and third cycles are for data writing, reading or for an I/O operation. Control code 1 indicates an I/O operation, control code 2 (octal) indicates a memory data read cycle, and control code 3 indicates a memory data write cycle.

The power supply produces positive 5 V at 5 Amps, and —12 at 1 Amp.

RLC

MOV B,A

LDAX D

ADD B

times 2 for branch table index ? almost save "2n" in B

fetch "n" again . . . translated character "3n" = "2n + n" . . .

rest of

NEXT TOKEN

One final word — this is an example of a "patch". As programs grow and patches multiply the result can get hairy. There is no pretension that this is the optimal code for the next token algorithm; one of the challenges of programming is to see how close one can actually come to optimal code.

BYTER's DIGEST

Don't Forget the Pinouts of These Memory Circuits — They're All Very Useful Both in Building More Memory for Kit Products and as Memory Elements of Your Own Designs . ..

ADDRESS <

FROM

D IN

ill

SYSTEM

IK BY

1

RAM eg: 2602 2102 9102

4

9

6 ,

o-=

7

2 f

1 t

13

16 t

15 ,

14 .

l20 THREE S

D OUT

power:

+ 5V=PIN 10 GND=PIN9

WE WRITE ENABLE 0= WRITE l-READ

CE CHIP ENABLE 0» ENABLE I" DISABLE

TO SYSTEM INTERFACE

Fig. 1. The 2102, alias 9102, alias 2602. This memory circuit is the most generally useful item on the market. You will find it in graded price ranges depending upon speed; for the 8008 and other slow processors, the low speed and inexpensive versions with access times up to 1 microsecond can be used. For the later generation microcomputers such as the 8080, M6800 or MCS6501 or PACE, higher speed versions are recommended in most cases if you want to take advantage of full processor capability. For complete specs, see the manufacturer's specs. Here is a pin diagram of this memory design. To use it, present addresses then Chip Enable should go to logic 0 (ground level), then after the access time delay you can either read the output data lines, or write what you've presented on the input data line. The write operation is performed by a low-going pulse on the WE line, with a minimum duration of from 300 to 750 nanoseconds depending upon the speed rating of the chips you buy.

*NOTE: When talking about logic and memory, the notation "K" means 210 or 1024, not 10s or 1000.

CE CHIP ENABLE 0=ENABLE l=DISABLE

ADDRESS {

power:

+ 5V=PINI4

A0

12

256 BY 4

RAM

SIGNETICS 2606

GND-PIN B

II

• l5 >D0l

- IS -DI

10

TO SYSTEM BUS

9 r

1

1 INTERFACE

' (THREE STATE BUS)

7

2

6

5 t

lA7

"1

WE 0»V 1 - F

WRITE ENABLE YRITE EAD

Fig. 2. The Signetics 2606 part is a variation on the static memory concept which uses a parallel 4-bit word orientation. There is a total capacity of 1024 bits in 256 words. For reading out of this memory, you hold the Write Enable (WE) line at logical 1, select an appropriate combination of address inputs, then drop the Chip Enable (CE) to logical 0 to enable the output bus drivers. To write into the memory, you enable the chip as if to read, but drive the data bus from a source such as your CPU while dropping the Write Enable line to the logic 0 (ground) level for a short period (minimum 400 ns). The spec sheet for the 2606 gives an access and cycle time of 750 ns, which means that it is on the hairy edge of working with one of the 1 microsecond cycle second generation microprocessor CPUs. Here is the pinout of the 2606 part.

79

Shipmates

WAT

If'

to joinbaref oot'e

i§Wiii?i

■■i

And, we'll promise you only one thing. The most adventurous vacation you have ever experienced. Hop aboard our schooner for lOsunfilled days and moonlit nights. A congenial group of shipmates now forming and setting their heading for Saba, Grenada, St. Lucia, Guadaloupe. And, Dutch St. Maarten. And, French Martinique. Explore pink, white and black sand beaches. Scale the cliffs, climb a volcano, prowl old forts and quaint towns. Hoist the sails, take a turn at the wheel or feet on the rail and let us do the work. Then limbo to a steel band and fall asleep under a star spangled Caribbean sky. Share from S250.1 f you have the spirit... come Windjammin'... a true life adventure. This coupon will bring you a full color adventure brochure.

Send me your color brochure on 10 day 'barefoot' vacations from $250.

Name _ Address . City

Zip.

©Windjammer Cruises.

Post Office Box 1 20, Dept. 00, Miami Beach, Florida 33139.

80

What Are We Getting Into?

While many hobbyists tend to think in terms of their own uses for microprocessors (uP) such as games, music, art, index systems, mailing lists and such, we shouldn't forget the enormous business applications for these systems once they are commonly available.

We can see uP systems with 1500 megabyte storage (or larger) which would make very economical packages for lawyers, for example. Entire law libraries could be right at hand with access taking less than a minute to any case. Commonly used legal forms could be filled out via video

terminals (VT) and then printed on a line printer. Complete records of all clients would be immediately available, plus billing, phone calls, etc.

How about a uP system for doctors? The preliminary diagnostic work could be done by a receptionist during the heel cooling period in the waiting room, and this might even include temperature, heart, blood pressure, and a few other sensors hooked into the uP. The VT would be used with a diagnostic program to ask the questions.

No disease, no matter how rare, could evade a really good uP diagnostic system.

And the uP would print out the prescription and instructions for the patient.

You can work up your own dream of inventory controls for shoe stores, drug stores, and other businesses.

Considering the applications on the horizon, one can understand why so many firms are getting that glint in their eye when they think about making hardware for it. It seems likely that there will be more uP systems sold during 1976 than there are computer systems in the country presently in use.

While we are thinking in terms of $500 uPs at present, this may go down to $250 and then even $125 for the processors. VTs are presently running about $350 and could get to half that in time. Floppy disk systems are being announced in the $2000

range, hinted at in the $1000 range, and predicted to drop to $500. Bulk memory systems using some new tape cartridges promise to provide enormous data bases with access times of 20 seconds maximum and an average retrieval time of 10 seconds. This might not satisfy Avis or American Airlines, but it is superb for a legal assistant researching cases.

If you are plugged into any developments of interest to BYTE readers please consider this an open invitation to pass along the information as soon as possible.

BYTE hopes to provide a stabilizing infl uence, encouraging standards, compatability, and harmony in the uP field.

—Wayne Green

USE OUR HARDWARE ASSEMBLERS^/

SAVE TIME AND FRUSTRATION WITH THESE CONVENIENT PRINTED CIRCUITS Q

4096-BYTE MEMORY MATRIX MACRO CARD

Have you ever wanted to construct a memory matrix as part of a system?? The tedious part is the interconnection of all the address and data bus pins! The CDA-1.1 memory matrix is a general purpose memory prototyping card for the 2102/2602/9102 pinout static RAM chips. This PC card is 8"x10" with 70 pin edge connector, gold plated for reliability. The memory matrix occupies about 60% of available area with all lines brought out to pads for wire-wrap pins and has plated-through holes. The other 40% has 24 16-pin socket positions and a general purpose area which can hold 12 16-pin sockets, or 4 24-pin sockets, or 2 40-pin sockets. Add a custom wired controller to interface this board's memory matrix to any computer, or use the prewired matrix as the basis for a dedicated 4K by 8 memory in a custom system. Think of the time you save!! GENERAL PURPOSE PROTOTYPING CARD

The CDA-2.1 general purpose 8"x10" prototyping card comes predrilled for use in construction of custom circuits. This board accommodates 1 6-pin sockets plus has a general area for 1 6-pin sockets or 24 or 40 pin sockets. The 70-pin edge connector is gold-plated for reliability and the pins are brought to pads for wire-wrap post insertion. The socket side has a solid ground plane to minimize noise problems; busses on the wiring side allow short jumper connections for power and ground. A whole system may be constructed in modules with these boards.

DIGITAL GRAPHIC DISPLAY OSCILLOSCOPE INTERFACE, CDA-3.1

James Hogenson (see the October issue of BYTE magazine) designed a 64x64 bit-matrix graphics display for oscilloscope. This design permits use of your scope as a display for ping-pong, LIFE, or other games with your system. The CDA 3.1 card provides all the printed' wiring needed to assemble the graphics display device down to the TTL Z-axis output as described in October 1975 BYTE. To complete the display you merely add components to this double sided card with plated-through holes. For info: CIRCLE READERS' SERVICE NUMBER - or, send your order using the coupon below:

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SHARE BYTE

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Subscriptions are only $12 — cheap enough to spread joy and fun among a few friends — like for Christmas. Tell you what — the second and onward subscriptions will only be $10 — Christmas Special — good until the end of the year.

A subscription makes a great Christmas present because it is something where the recipient gets a reminder every month for a year of your thoughtfulness.

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83

NEVER YOU MIND

OCCUPANT BOX BYTE PETERBOROUGH NH 03458

ABITOFNYBBLING AT BYTES IN A WORD

Dear Sir:

I was very delighted to receive the first issue of BYTE. I found all the articles, and even the letters interesting, absorbing, and amusing. There are, though, three points about which I would appreciate some information and clarification.

First of all, I seem to be a bit confused about your use of the words "word", "byte" and "bit". As I understand their usage, "word" refers to the grouping of "bytes" which are considered to be one memory location, and "byte" is a grouping of bits, three or four depending on whether octal or hexadecimal is used. The article "Which Microprocessor for You?" seems to use the terms "word" and "byte" interchangeably, which confuses me about the processor's location referencing ability. Who is right, me or you?

Secondly, I have seen information about 8-bit and 16-bit microprocessors, but no ads about 12-bit microprocessors. Having gotten my programming training on a 12-bit system (PDP-8/L) may have made me unduly partial to 12-bit words, but an 8-bit system would not allow me to cheat and store two ASCII characters in a location, while 16 bits seems too big for my desires. Does anybody put out a 12-bit microprocessor with 4k memory?

Finally, I see a large number of keyboards out on the market; I do not see any printers, line or teletype type. Where are they hiding?

Thank you for your attention.

Stephen Holland Glenview IL

Thank you for your letter,

Stephen. Precision in

description of concepts is one

of the most powerful

techniques in the human

race's evolutionary bag of

tricks. The only hitch is

communicating what the

definitions are when there are

many different people

involved and each has a

unique past experience.

Hopefully in written

communications we can keep

the ambiguities (other than

occasional fun) to a

minimum. To clarify your

very valid complaint about

memory terms, the following

are some fairly fundamental

definitions. When you read

certain articles, such as Hal

Chamber/in's, it turns out

that two of these definitions

are equivalent. For other

situations they may not be:

*A bit is the fundamental —

it is the unit of storage. All

other terms are described in

terms of bits. One memory

cell can hold one bit's value

of logical zero or one.

*A byte is a grouping of bits

in the organization of

memory, usually defineda/a

IBM as 8 bits. (Nybbles are

half-bytes.)

*A word is the generic and very general term for "n" bits at once in a computer's

memory. The term word is

the same as byte when

referencing an 8-bit

byte-oriented machine, but

will certainly differ for a

12-bit PDP-8 or a 16-bit

PDP-11 or some old 36-bit

Univac clunker or a 60-bit

CDC machine.

If that's not enough to

confuse the issue, some of the

early literature on machines

such as IBM's old STRETCH

computer referenced variable

sized bytes extending the

definition to "any group of n

bits".

In general, though, a given machine will have a "memory address space" for direct reference to a particular size of ''word". For the byte-bangers (8080, 6800, 8008, 6501, F8, etc.) each memory address gets you one byte. For a PDP-8 each address in memory gets you one 12-bit word. And so on. As far as 12-bit micros go, there are none which are generally available to amateurs yet. There is the CMOS PDP-8 replacement which Intersil makes, but it is very expensive as yet. There is the FABRI-TEK processor which is an MSI copy of a PDP-8 at about $1000 for the CPU, but again a working system is not inexpensive. The FABRI-TEK machine does come with 4k built in at the price.

Concerning printers, you are again getting up in price. A simple receive only Teletype is about $200-300 if you get to the right place at the right time in the surplus market. There is something called a Creed Teletype which I have seen some literature on — an old 5-bit Baudot machine which you could probably hook up fairly easily to Bill Godbout's PACE processor with its ASCII-Baudot software. Where are the printers hiding? In surplus houses which don't advertise 'em because their stock changes too frequently.

.. . Carl

Dear Carl,

I just finished reading the first issue of BYTE, received today. I found the articles interesting but now realize how little I know about programming terms and functions.

I've been in ham radio and radio and television broadcast engineering for well over 15 years. I understand the basics of digital electronics and have designed control circuits and enjoy using digital techniques in other types of electronic circuitry.

I can follow the articles until the author starts hitting me with programming terms, then I'm lost. Perhaps you might try to educate such as I with some very basic articles on programming and those hardware functions mostly limited to computers. You might also recommend some up-to-date books on these subjects.

I would very much like to learn more about this field. Perhaps I'm not the typical reader you are publishing BYTE for, but I suspect there are other readers out there with the same problems.

I'd also like to see you insert a bingo card to make it easier to get further information and catalogs from your advertisers.

Kenneth Knecht Chicago IL

Thank you for your input, Ken. I am indeed worried about the problem of acquainting the novice readers ofB YTE with the terminology and concepts of home brew computing. I'm working on getting various authors to submit tutorials on the concepts of programming for people such as yourself with a strong hardware background. Then there is the analogous problem from the other side — explaining the mysteries of hardware to software people. For instance, a softwareoriented friend of mine

84

pointed out that he got lost on the diode matrix concept in the keyboard article of BYTE #7, a concept which is probably familiar to a number of readers with a hardware background. As long as I am enumerating possible approaches to the art of home brew computing, I shouldn't forget the person who has neither hardware or software background — the complete novice.

The way I can find out about what "the typical reader" is thinking is for "the typical reader" to send in comments, as you have. One of the biggest unknowns I had when I first came up with the problem of editing this magazine was figuring out in my mind just what the readership is: Is it a bunch of hackers from the MIT or SRI artificial intelligence labs? Hardly — although I know a few who subscribe. Is it the group of ambitious people who started 8008 projects when they first came out? Yes — but not exclusively, by a long shot. Is it the engineer who always wanted his own hardware — but never heard of software engineering? Yes — some readers fall in that realm. Is it the applications programmer who gets kicks out of programming and always wanted a processor of his own? Of course — there is more than one COBOL programmer in the audience to say nothing of FORTRAN people and PL/J people.

Is it the BASIC fundamentalist who is lost in his applications games and suddenly discovers there is more to computing than GOSUB and LET? Sure - and he has a whole realm of hardware and software to learn about. The problem is a tough one — but constructive input from readers in the form of articles and opinion is an important key to shaping the content of the magazine. Introductory materials and

articles to get people acquainted with terminology will be in future issues — as you'll find to be true in this issue as well.

. . . Carl

WHO IS STEPHEN B. GRAY?

Dear Sir,

Your description of the Amateur Computer Society (ACS) in the Clubs column of the first issue of BYTE is strangely constructed. Please allow me to supply your readers with further info about the ACS along with some history of the home computer "hobby."

Stephen Gray organized the ACS in 1966 to serve everyone who is involved in designing and building his own home computer. The ACS is an informal organization, with no such thing as officers or meetings, since its members are widely separated across the U.S. The main function of ACS has been to initiate the exchange of ideas and equipment among its members. This is done by the ACS Newsletter, which describes the plans and accomplishments and acquisitions of the various members. It also lists the sources of surplus computer parts available for the hobbyist. Back in the late 60's and early 70's there were no kits available to buy, and not too much surplus computer equipment. This meant that most home computer builders had to design their CPUs and I/O interfaces from scratch. The ACS in those years was made up mostly of digital circuit and systems design engineers. It was like the early decades of amateur radio, when not much commercial equipment was available for hams to buy.

Today there are several hundred ACS members representing all kinds of careers in the electronics and computer industries. Lots of them have had operating home computers for five to eight years! These people have a really wide variety of home computers, from old vacuum tube ones and all discrete germanium transistor ones to microprogrammable LSI minis and microprocessor based ones. Some of them have reconditioned obsolete models that you can't even buy parts for anymore, with such weird peripherals as drum memories and flexowriters. Others have lots of the latest stuff, like CRT graphics terminals, digital cassettes, and floppy disks. And of course lots of them have designed their own CPU architecture and instruction sets to provide special purpose capabilities that are unmatched by anything in the industry.

Then any article published for one of these systems will be quite useful to thousands of people.

But as it is now, there is little in the Iine of construction articles and detailed program descriptions (with source code listings) that could be directly used by more than a handful of ACS members. Therefore, Stephen Gray does not publish such articles in the ACS newsletter. Instead he has used this disparity as an opportunity to make it a more personal newsletter, reporting in each issue what various individuals have accomplished, what difficulties or experiences we have written about, who of us have information or equipment to sell, or trade, who needs information about certain equipment, what new items are available commercially, to the home computer market and so on. All in all it's a very helpful

"The ACS is an informal organization, with no such thing as officers or meetings .. . the main function has been to initiate the exchange of ideas and equipment..."

With such a wide variety of approaches, design philosophies and languages existing in the home computer field, each ACS member's computer "lives" in its own special world, having little in common with the next member's computer (which may be several dozen miles away ). Compare that with tomorrow's home computer scene, where there will be thousands of people with systems built around audio cassette mass storage, VDTs and 6800s and 8080s.

and informative newsletter. I feel that Mr. Gray has done an excellent job of bringing us home computer builders together, and 1 believe that the ACS and its members have quite a lot to offer to the new generation of home computer enthusiasts that have been spawned by the age of the microprocessor. I think that the recent developments in our field are just great and the near future promises to be absolutely fantastic! It all can't come soon enough for

85

me! Even though science fiction writers predicted it long ago, who knows what the future of computing will bring? I certainly welcome BYTE into our field and wish you the best in this new computer age.

Dick Snyder Chelmsford MA

Strangely constructed? Indeed! The goal of obtaining more information was accomplished, Dick, although Mr. Gray is too modest to send it to BYTE himself. All I had to go on was one cryptic letter Stephen B. Gray had written to Wayne Green and a file reference supplied to me by Richard Gardner who makes it his business to know what's going on where and by whom.

I am firmly of the belief that anyone who has made verifiable contributions to the technological progress of this extremely interesting hobby should be recognized — as you point out in your letter Mr. Gray has made such a contribution by serving as a focal point for a group of the pioneer home computer hackers. To the best of my knowledge he is the earliest person to put together a vehicle for communications amongst home brew computer people, a notable contribution.

.. . Carl

The comparison of simple subroutines for different microcomputers does not show the relative merits of the machines.

WHICH

MICROPROCESSOR

EVALUATOR

FOR YOU?

Dear Editor,

I am pleased to see a high quality magazine for the computer hobbyist. In this large and fast changing field BYTE will be invaluable as an educational and informational forum.

I have spent the last three years programming microcomputers, most recently writing ALTAI R BASIC with Paul Allen and Monte Davidoff, and hope to share some of what I've learned with your readers.

I do have some disagreement with statements made in Hal Chamberlin's article "Which Microprocessor for You?" Of the three micros, the IMP-16, the Intel 8080 and the Intel 8008, the 8080 has the best memory efficiency due to the number of things that can be done in a single 8-bit instruction. The IMP-16 is second best, requiring 30% more memory bits; and the 8008 is a distant third, requiring about twice as much memory as the 8080.

The IMP-16 is the fastest machine with the 8080 a close second. The 8008 is at least 1 2 times as slow as the 8080. This is because the 8008 not only has a much slower cycle time, but it requires many mo re operations to perform an equivalent function.

Software from MITS costs about six times as much if hardware is not purchased from MITS. As long as hardware is purchased from MITS, MITS is willing to just break even on the software.

The comparison of simple subroutines for different microcomputers does not show the relative merits of the machines. The best way

someone who doesn't know a lot about software can judge the different microcomputer; is by seeing how large and how fast a large program like a BASIC interpreter or FORTRAN compiler written by a professional programmer will run on the machine.

William H. Gates

President, Micro-Soft

Albuquerque NM

PS: The program on page 54 of BYTE #1 doesn't work since the dispatch table entries are three bytes long instead of two.

The substance of Bill Gates' letter is that the problem of evaluating a computer's performance is a complicated issue. Every machine has its little idiot-sy ncrasies which enable it to outperform its competitor in a specific context. The tests one uses to evaluate the machine in many ways affect one's results: Bill (like myself) would tend to evaluate a machine based upon a complicated "benchmark" application or systems program. This sort of evaluation typically will exercise the full range of the CPU's instruction set in a real-world large program context. Other people would tend to evaluate not upon that benchmark, but on the ease of generation of machine code which is fully optimized by a modern compiler. The compiler writer's benchmark is different from the systems hacker's benchmark. Then there is the small computer world — which is the best computer from the home brew hacker's standpoint? Probably in the current state of the art it is the machine which has the easiest instruction set to deal with given a modicum of support in the form of assemblers from the kit supplier.

People have been evaluating computer instruction sets since the first

time some disgruntled programmer cu/sed at an IBM 650 (or earlier) product. A nd people will continue to do so. I'd like to see some of BYTE's readers giving personal evaluations of their own experiences programming some of the machines which are now available. This will produce still another form of benchmark.

Oh yes, regarding the mistake on page 54 — see the "Diagnostics" heading in the Nucleus of the Queue, in this issue.

... Carl

IT'S GREEK TO ME ...

Carl,

With all due respect, your dump of computer organizations in the last issue of BYTE was incomplete! (Obviously a hardware bug.) You omitted perhaps the biggest one of them all (at least in potential) — Beta lota Tau (BIT). Yes fans - that's right — it's here now — the first computer science college fraternity. Us knurds got our (expletive deleted) together this time. You say you never heard of us? That's understandable, we're new (and not fully established yet). As of the present only two chapters are emerging from the mass of red tape (7, 9 and Cassette): the founding chapter here at Rose-Hulman Institute of Technology (and software disproving grounds), and the Beta chapter at Michigan State. As the probability of this publication finding its way to college campuses this fall approaches one as a limit, we would like to take this time to rip off some advertising space.

Are you interested in starting a chapter of BIT at your college or university? If you are, then ASCII some of your friends. Show them this crazy letter we're writing at this crazy hour. Drop us a

86

line (RS-232 compatible) at the address below. We'll send you more information as we get it ready. If nothing else we'll help synchronize you with the rest of the knurds at your school (provided they write in also). Write to:

000* BETA IOTATAU 001 * c/o Richard A. Petke 002* R.H.I.T. Box 520 003*Terre Haute IN 47803

For BIT,

R. Petke

High Order Bit

B. Cop us

Chairman of the Vice

L. Passo

I/O Processor

/ suppose it just had to happen some time. I'm glad to hear about BIT, Richard. The very idea of BIT leads to all manner of intricate and exciting possibilities. Why, to start off with, you'll need to recruit a bunch of novices known as "Least Significant Bits'' into which

they have been indoctrinated with their Initialization Writes, they can work their way up through the ranks. But you will have to be selective about it — you'll have to watch out for shifty characters. AND In the fall you can schedule (at high priority) some major social events in the BIT house culminating in the Masked Ball around Halloween. OR in the spring you can have another big social affair at which you'll crown the Queen of the PROM (hopefully she'll not get burned). Speaking of such matters, to be fair you had better organize the logical complement of your organization. Find some ladies to form a sorority, or change your parameters and get some grand scale integration into your organization. Keep me posted on progress of BIT.

. . . Carl

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87

from page 7

be unused. In general, as many of these locations as you can afford should be filled up with random access memory chips, which, experience has shown, people are always able to use up in programs. Sooner or later you will find yourself limited by the constraints of small memory! For the benchmark system, the minimum random access memory should be 4k (4096) 8-bit bytes or 2k 16-bit words. A preferable number is 8k bytes or 4k 16-bit words.

ROM Systems Software?

How do I get my first programs into memory after turning on power? The answer to this question is the method of "bootstrapping" or "initial program loading" (IPL) which is used by a computer. Early in the minicomputer game, technology of computing was at a state where the principal bootstrapping method was a set of front panel switches which addressed memory locations and allowed the programmer to put in short programs by hand.

With the advent of the new high density ROM integrated circuits, it is now possible to provide the convenience of an automatically bootstrapped system through systems software which is cast into the concrete form of an ROM device.

Many of the kit suppliers I have talked to are either currently supplying or intending to add this ROM systems software feature. Initially, the programs which

Experience has shown that sooner or later you'll feel constrained by any size of memory — the greed of many programmers for more memory is unbounded!

are "built-in" tend to be fairly standard "control panel" type routines which use a terminal (Teletype or television typewriter) for a set of simple commands. Later — with inputs from users regarding desirability you can expect to find prepackaged assemblers and high level language compilers/interpreters occupying major portions of the address space available in typical microcomputers. This will make the systems software feature even more versatile.

Keyboard and Displays?

But of course. The interactive nature of an editor capability cannot be realized with a mere control panel. The same thing goes for most of the more interesting applications of the small computer. You will need a character-oriented display device and a typewriter style input — whether these be a TV typewriter or an old Baudot coded Teletype clunker is up to you. The typical programs will be controlled by keyboard commands and will produce outputs back to the display.

Cassette Tape Interfaces — Mass Storage Without Mass Dollars

Mass storage is a definite must item for the small computer system. But traditional industry peripherals tend to be expensive, starting at the low end with digital cassette drives and floppy disks at about $500-$800, and working upwards. The solution is to adopt an audio recording method which uses inexpensive ($50) cassette recorders and appropriate interfaces. This allows you to perform the edi ti ng benchmark function while keeping the total system cost low. I'll have more to say on this subject later in this editorial. A minimum of two such tapes is required for a

decent editor, because one must be set to "read" old data, and the second must be set to "write" new edited data resulting from your changes. Three is a more desirable number still if you want to do "sort/merge" applications, but two will suffice for the editing benchmark.

Suppose Your Budget is Limited — Can It be Done in Stages?

What I have just described is the minimum necessary equipment for a fully functional implementation of the small computer benchmark capability, editing. Modularity rules in the computer world, however, so you can easily start out with less function and work up to the benchmark capability in time. You'll also probably end up exceeding this benchmark of

hardware/software capability after a while; modularity docs not stop at this level of function. The basic place to start is with a CPU - it'll not be much more than a blinking light box without peripherals, but that's enough to show that "it works " Then, you can add on the interactive keyboard/display of some sort, along with memory (presumably the ROM software came with the CPU). Finally, you can add on the tape interfaces and additional memory in order to arrive at the full benchmark capability. From then on, you can enhance the system with new peripherals and more memory until you end up with a very capable system which can run full BASIC, a decent systems programming language compiler, and all the games, practical applications and amusements you can dream up for the computer.

BYTE's Ongoing Monitor Box (B.O.M.B.)

BYTE would like to know how readers evaluate the efforts of the authors whose Wood, sweat, twisted typewriter keys, smoking ICs and esoteric software abstractions are reflected in these pages. BYTE will pay a $50 bonus to the author who receives the most points in this survey each month. The following rules apply:

1. Articles you like most get 10 points, articles you like least get 0 (or negative) points — with intermediate values according to your personal scale of preferences.

2. Use the numbers 0 to 10 for your ratings, integers only.

3. Be honest. Can all the articles really be "0" or "10"? Try to give a preference scale with different values for each author.

4. No ballot box stuffing: only one entry per reader!

Fill out your ratings, and return it as promptly as possible along with your reader service requests and survey answers. Do you like an author's approach to writing in BYTE? Let him know by giving him a crack at the bonus through your vote.

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BEST

12 Lancaster: Ins and Outs . . .

20 Wadsworth: Computers Are . .

36 Wier: Hexpawn . . .

42 Gipe: Computers . . .

52 C. Helmers: Notes . . .

56 Fylstra: Son of Motorola

64 Nico: Monitor 8V4 . . .

66 P. Helmers: Versatile ROM . .

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23456789 10

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88

5% OFF ON ORDERS OVER $50.00 10% OFF ON ORDERS OVER $100.00 15% OFF ON ORDERS OVER $250.00

TTL

7451

.17

74154

1.25

7400

J .14

7453

.17

74155

1.07

7401

.16

7454

.17

74156

1.07

7402

.15

7460

.17

74157

.99

7403

.16

7464

.35

74158

1.79

7404

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7465

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74160

1.39

7405

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7470

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74161

1.25

7406

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7472

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74162

1.49

7407

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7473

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74163

1.39

7408

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7474

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74164

1.59

7409

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7475

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74165

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7410

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7476

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74166

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7411

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74170

2.30

7413

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7485

1.10

74173

1.49

7416

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7486

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74174

1.62

7417

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7489

2.48

74175

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7420

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7490

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74177

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7423

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7492

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7425

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7426

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7432

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74187

5.95

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74190

1.35

7438

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74107

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74191

1.35

7440

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74121

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74192

1.25

7441

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74122

.45

74193

1.19

7442

.77

74123

.85

74194

1.25

7443

.87

74125

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74195

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7444

.87

74126

.63

74196

1.25

7445

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74141

1.04

74197

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74145

1.04

74198

1.79

7447

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74150

.97

74199

1.79

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74151

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74200

5.90

7450

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74153

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1.69

74L04

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74195

1.69

74LK

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74173

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74L98

2.79

74L10

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74L74

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74L164

2.79

74L20

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74178

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74185

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8520

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8830

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8551

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8831

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1.97

8552

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8836

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4050A

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4001A

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4069A

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4006A

1.35

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4071A

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1.79

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4075A

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4027A

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4081A

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2.66

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1.76

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2.48

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1.13

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Red TO 18

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MV50

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fumbo Vis. Red (Red Dome)

.22

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ME4

Infra red dill, dome

.54

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Red 7 seg. .270"

2.19

MAN2

Red alpha num .32"

4.39

MAN4

Red 7 seq. .190"

1.95

MANS

Green 7 seg. .270"

3.45

MAN6

.6" high solid seq.

4.25

MAN7

Red 7 seq. .270"

1.19

MAN3

Red 7 seg. .127" straight pins

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3.45

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3.75

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HP5082 5 digil .11 led magn. lens

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magn. lens 4.95 SP-425-09 9 digil .25" neon direrl inlerlace with MOS/LSI, 180 VDC, 7 segl.79

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MM5013 MM5016

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937

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TO-5

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mDIP TO-5

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mDIP TO-5

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308

Micro Pwr Op Amp

mDIP TO-5

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309K

5V 1A regulator

TO-3

1.35

310

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mDIP

1.07

311

Hi perf V Comp

nDIPTO-5

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319

Hi Speed Dual Comp

DIP

1.13

320

Neg Reg 5.2, 12, 15

TO-3

1.19

322

Precision Timer

DIP

1.70

324

Quad Op Amp

DIP

1.52

339

Quad Comparator

DIP

1.58

340K

Pos V reg (5V, 6V, 8V.

12V, 15V, 18V, 24V)

TO-3

1.69

1 3401

Pos V reg (5V, 6V, 8V,

A

12V. 15V, 18V, 24V)

TO-220

1.49

iM

AF-IF Strip delector

DIP

2.93

J

AM/FM/SSB Strip

DIP

.53

376

Pos V Reg

mDIP

2.42

377

2w Stereo amp

DIP

1.16

380

2w Audio Amp

DIP

1.13

380-8

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mDIP

1.52

381

Lo Noise Dual preamp

DIP

1.52

3B2

Lo Noise Dual preamp

DIP

.71

550

Prec V Reg

DIP

.89

555

Timer

mDIP

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556A

Dual 555 Timer

DIP

1.49

560

Phase Locked Loop

DIP

2.48

562

Phase Locked Loop

DIP

2.48

565

Phase Locked Loop

DIP TO-5

2.38

566

Function Gen

mDIP TO-5

2.25

567

Tone Decoder

mDIP

2.66

M 709

Operational AMPL

TO-5 or DIP

.26

affl 710

Hi Speed Voll Comp

DIP

.35

711

Dual Difference Compar

DIP

.26

^B 723

VReg

DIP

.62

739

Dual Hi Perl Op Amp

DIP

1.07

741

Comp Op AMP

mDIP TO-5

.32

747

Dual 741 Op Amp

DIP or TO-5

.71

748

Freq Adj 741

mDIP

.35

1304

FM Mulpx Stereo Demod

DIP

1.07

1307

FM Mutpx Stereo Demod

DIP

.74

1458

Dual Comp Op Amp

mDIP

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1800

Stereo multiplexer

DIP

2.48

LH2111

Dual LM 211 V Comp

DIP

1.70

af| 3900

Quad Amplifier

DIP

.35

V| 7524

Core Mem Sense AMPt

DIP

.71

■ 8038

Voltage contr. osc.

DIP

4.25

■ 8864

9 DIG Led Calh Drvr

DIP

2.25

M\ 75150

Dual Line Driver

DIP

1.75

75451

Dual Perepheral Driver

mDIP

.35

^P 75452

Dual Peripheral Driver

mDIP

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75453

(351) Dual Periph Driver

mDIP

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75491

Quad Seq Driver for LED

DIP

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75492

Hex Digit driver

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Benchmarks, Standards, etc.

I just described what I think is a reasonable version of the state of the art in small systems computing at the low end in price. Now, what can you expect out of the supplier of small systems products ^ that you can implement the benchmark capability? Well, for one thing, sooner or later every supplier will want to demonstrate this type of system with an editing capability. Note with care that I did not specify one iota of detail about the actual editor programs themselves which implement the capability. I've hardly limited the software people (or lack of same) at the kit companies to a particular implementation. There will be plenty of room for variations on the basic editor concept from supplier to supplier, in terms of meeting the benchmark requirement.

The only supplier of kit computers who comes close to demonstrating the under $1000 benchmark to my satisfaction is Scelbi Computer Consulting in Milford, Conn. Their 8008 oriented system has reasonably priced software listed in their catalog for a tape editor program, and the peripherals/memory products they list look sufficient for this capability. (MITS: I get

Standardization is a must for the growth of this industry — both for the users of the equipment and the manufacturers.

the impression that from your prices and available printed data, your library of programs is oriented to the larger systems which implement your BASIC interpreter. This puts them out of the class of under $1000 computer systems, although your new 6800 system may be in the small computer benchmark classification of this editorial.)

As manufacturers send me evidence (documentation, systems summaries, program listings, etc.) for the small systems benchmark capability, I'll report on them either in the editorials of BYTE or in review articles commissioned for that purpose. Readers can help prod the software departments (or lack of same) at the various kit manufacturers by writing them to urge demonstration of both the benchmark capability and to urge "bundling" of that valuable systems software — the editor — as part of the package of items which comes with the computer.

Comments on Kit Documentation: An Open Letter to Manufacturers

What should readers expect from a kit manufacturer? BYTE is certainly looking into the various kit products with the reviewers' soldering irons, pens and typewriters in hand, so we can present a critical evaluation of the ease (or lack thereof) of assembly of the products. Just so you won't have it sprung on you without warning, I thought a

few comments on assembly manual standards for reviewing kits might help, and it will give our readers an idea of what to look for when they buy these products. For starters, let's concentrate on the first documents the kit builder has to come across — the system's assembly and hardware checkout documentation.

Manufacturers, be on your guard here! Microcomputers are complicated pieces of equipment which cannot tolerate mistakes in assembly if the result is to be a functional unit. Further, since there is a finite possibility of bad integrated circuits getting through your quality control procedures (if any), you had best make sure you can count upon your customers to diagnose any problems which might arise. While you can assume an above average intelligence on the part of your customers — the readers of BYTE — you cannot assume a complete familiarity with all the details of your system. The burden of clear and understandable presentation lies upon your shoulders. The days of the two page description of some digital logic circuit being passed off as an assembly manual are over when it comes to microcomputers. Kit computer builders do not need the Heathkit overkill approach to assembly procedures, but they do need more than a skeleton of a manual. There is a balanced middle ground between the extreme of minute detail on one hand, and a bare circuit diagram with parts list on the other. Here are some of my

thoughts on what a good assembly and checkout document might contain.

System Summary: A description of the overall design of your product, and where the particular unit being assembled fits into that design.

Complete Schematics: The need for these goes without saying.

Parts Lists: Specify what you think you ship, and stick to it as closely as possible. The user can check it off and pick up errors.

Recommended Assembly Sequences: Give a fairly detailed sequence of assembly, more than "stuff PC boards," "solder" then ''checkout.'1 As a manufacturer you should assemble the kit at least once yourself while taking notes on paper or magnetic tape. In any given mechanical and electrical assembly design, there is bound to be an optimal sequence of steps — being close to it you should be able to give a good approximation of the optimum. The assembly sequence should be specified with sufficient detail — pictures where necessary — so that an intelligent reader can reproduce it.

Checkout Sequences And Self-Test: Thought should be given to the sequence of procedures needed to verify the operation of the kit once it is assembled. Do not under any circumstances leave your checkout procedures to a strictly "nominal" course. I can predict that sooner or later some of your customers will find common glitches in assembly. Give a lew side branches in the checkout procedures for commonly occurring problems. "Ah," you protest, "but I don't

90

fSSM 7400N TTL *m

SN7400N

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SNM10N SN74IIN SN74I2N SN/413N SN74I4N SN/416N SN7417N SN7-JI8N SN/J20N SN74?1M SN7-1P3N SN7475N SN747(iN SN742/N SN7429N SN7130N SN7132N SN7437N SN7438N SN7433A SN7440N SN 74-11N SN7442N SN7443N SN7444N SN7445N SN744SN SN7447N SN714SW SN74SDN

SN/4!

IN

SN7453N SN7454N SN7469A SN/4GON SN74 70N SN7472N SN7473N SN7474N 5N74 75N SN747UN SN7480N SNMB2N SN7483N

I SN7485N

SN7486N

! SN7488N

SW74B9N SN7490N SN 7.13 IN 5N7<!92N SN74S3N SN7494N SN74S5N SN749CN SN741 DON SN74107N SN/412IN SN74 122N SN74123N SN7412SN SN74126N SN74132N : SN74141N SN74142N I SN74U3N I SN74144N

I SN74145N

SN74148N ; SN7415DN

i Discmint fur 100 C

SN74I5IN SN74153N SN7415/.N SN74I55N SN7415CN SNM157N SN741G0N SN74 IE IN SN74I63N SN711 GIN SNM1G5N SN74166N SN741G7N SN74I70N SN/4I72N SN74I73N SN74174N SN74175N SN7417GN SN/4177M SN74180M SN74181N SN74182N SN71I84^ SN7418SN SN74IB7N SN741MN SN74191N SN74192N SN74I93N SN74194N SN74I95N SN74I9BH SN74I97H SN74198N SN74199fJ SN74700N SN74261N SN74284PJ SN7428SN 7400's

CD4OO0 CD4001 CU4O07 CO4D0G CD4007 CD4009 CD401Q CD-1011 CD4012 CD4013 CO10I6 C04GI7 CD4019 CD4 070 CD4027 CD4II23 CD4II24 CD4025 CD407? CD4078 fD4|)?9

CMOS

C0403Q

C04035 CD4IJ40 CO J 012 C04044 CD4046 CD404 7 CD4 049 CD405O CD4051 CO4053 CO406Q C&40G6 CD40G9 CD4D71 C04081 74C00N 74CQ2N 74 COIN

2.45 1.90 1.50 2.51 2.75 .79 .79 2.98 2.98 3.25 1.75

74L1HN

74C20N

74C30N

74C42N

74C73N

74C74

74C90N

74C95N

74C107N

74C15I

74CI54

74C15

74CIG0

74CIG1

74C1G2

74C164

74CI73

74C193

74C195

80C97

2.90

3.00 2.15 3.25 3.25 3.00 3.25 2.60 2.75 2.75

LMIQOH

LM10GH LM17IH LU2I7H LM300H LH301H

LINEAR

3 I 00

1 OQ

LM30ICN 31.00 LM302H LM304H IM305H LM307CN LM30BH LM308CN LM309H LM309K LM3I0CN LM31IH LM311N LM3IRCN LM3IUN LM3190 LM370K 6 LM320K 5 7 1.3b LM320K 17 1.35 LM320K 15 LM323KS IM374N 1 BO IM339N I 70 LM340K5 I 95 LM3JDK 17 195 LM340K 15 I 95 LM340K 74 195 LM340Tr>5 1 75 LM340rf.fi 1,75 LM340To 17 1 75 LM340Ti> 15 1 7b LM340TO 74 I 75 LM350N 1 00 LM351CN 65 LM370N 1 lb LM3 70H 1 15

U1373N

LM377N

LM380N

LM3B0CN

LM3B1N

LM3H7N

NE501K

NE5I0A

NE531H

NE53GT

NE540L

NEbbON

NE553

1.39 106

GOO 3 00 6.00

6.00

79

7.50

9 GO

m.bD

NEbbbV

NE565H

NE5G5N

NE56GCN

NE567H

NE5G7V

LM703CN

LM7n9H

LM709N

LM7I0N

LM7MN

LM723N

LM773H

LM733N

LM739N

LM741CH 31 00

LM/4ICN 3'1 00

LM741 14N 39

LM/4 7H 79

LM747N 79

LM748H

LM/48N

LMI303N

LM1304N

LM1305N

LM1307N

1.25

1.9b

1.50

100 1 29

39

LM13IQN 2.95

LM1351N 1.65

LM1414N 175

LM1458C 65

LM1496N .95

LM155GV 185

LM2111N 1.9b

LM2901N 2.95

LM30G5N .69

LM390ON .bb

LM3905N 60

LM5556N 1.85

MC5558V 1.00

LM7525N 90

LM7528N 2.20

LU7534N 2.20

LM7535N 1.25

803BB 4 95

LM75450 49

75451CN 39

75457CN 39

75453CN 39

75454CN 39

75491CN .79

7b492CN 89

7b494CN 89 RCA LINEAR

CA3013 1.70

CA3023 2. IS

CA3035 2 25

CA3039 1.35

CA304I'. LIS

CA3059 2.46

CA30GO 2 80

CA30B0 8b

CA3083 1 GO

CA3086 .59

CA3089 3 25

CA3091 8.25

CA3123 I 8b

CA3G00 1 75

DATA HANDBOOKS

7400 Pin-out S Description ot 5400/7400 ICS S2.95

CMOS Pin-outs Description nl 4000Series ICS S2.9S

LINEAR Pinaul & Functional Description of

Linear Circuits S2.95

POWER SUPPLY CORDS

^^^2 CONDUCTORS SPECIAL

^^^"™^™" 3/S1.00

THUMBWHEEL SWITCHES

JAMES NOVEMBER SPECIALS

iNinoi biiv;-1 i

1N4002 inov t I

IN4003 ZQ0V@ 1

IN4Q04 4MV @ I

IN414B SwitdMin

i Tb SI on

15'Sl.OO 70S! 00

8 Bit LjI

TRAWSISTORS

7N73()7APNPSwndim.j

G'SI (10

7N2272ANPNSwili:lniiii

B'SI 00

7N3904 NPNAmp

b si.no

2N3906 PNPAniii

G'SI 00

7N918 NPNRF

ESI 00

7N5951 NJFet

6.S1 00

CIDGB1 3 fi Amp SCR

7 SI 00

7400 7447 F490

74100

74)54 Oetodei

74137 Couiiler 75

LM301H LMJ41H 4 SI 00

LM324N Qujd 741 1 19

LM303H HV Rul) TO 5 79

LM303K 5U Rug TO3 .99

DYNAMICSHIFT REGISTERS MM500H MM504H MMS10H 2 FOR MM5D3H MM50HH MM5D1GH SI.00

CLOCK &CALC. CHIPS S2.95

MM5312N HM53I3N MMS314M

MM531CN MMS72SN

MM573GN MM6738N

G Dngil B Digit

G Oii)i

Alaim

2.95 3.95 1.98

Dnjil 4 Fui BOiijiiI Fui B Digit 5 Fui 26 Awg RIBBON CABLE 1 Fl.Minimum 19 It. 1 0 ft.

4 Cmid. 8 Cond.

.29 It. .59 11.

PARTS SURVEY

I read the letter from Robert Briner In the June issue of R-E about his problem of obtaining parts overseas for projects. I now have nine months experience with several firms and received all the parts I ordered. The time it took to receive the parts varied from firm to firm. Here is a list of my experiences with the firms.

James Electronics Poly Paks

Internationa!

Electronics

Unlimited

Southwest

Technical

Products

Meshna

Electronics

Delta

Electronics

Solid State

Sales

Howard W.

Sams& Co.

Belmont, CA 7-10 days

Lynnfield, MA Monterey, CA

2-3 weeks (getting better) 2-3 weeks

San Antonio, TX 3-4 weeks

Lynnfield, MA Lynnfield, MA Somerville, MA Indianapolis, IN Dallas, TX

2-3 weeks 3-4 weeks 3-4 weeks 7 weeks I-IVS months

All the times are from the day I wrote the letter until I received the parts. H. K. BERKHOUDT Rotterdam (23)

Holland Rlprinted From Radio & Electronics

September 197b

DPST

C&K ROCKER SWITCH

They are rated at 125 Vac 0 5A. They are excellent in application such as Microcooipuier Panel Switches Dim: T'xT'x1/*" $0.69

HP-5082-7300 fe

HP-5II8? 73IM «■■

chi|j Only B luni (BCD in. OP. Larch.

hi'mVi:' win $5.95

WxWXFMERS P.C. Mount

SPECIAL

1/16 VECTOR BOARD

P Pattern

O 1" Hole Spacing

MCNQKC

m|»

**"

ii ':;§

;;..,., ■.„.

lli9P4.lOI.3f. 1 1 » M 'I' Oil

tie 6.3

Hcie'wi \uw con. big m IC capactly

Ineadtin.nil kn with all ihc qualnv ul OT Snr.kets and tlif Itest ol tlie Proto

■J OT }&S5ocVais; I (IT 3SB Bus Sin 2 b wti linidiif) posti. '1 ruliliet (eet; screws, nuts. Iiolts; dud saiy asseinlily

"Special

FND70 MAN 1 MAN 2 MAN 3 MAN 4 MAN 7 DL33 DL747

DISPLAY LEDS

Com. Cailt. .250

Com. Ano. .270 S

5x7 Matrix .300

Com, Cath. Com. Ano.

1.35 1.50 1.95 1.95

$

DISCRETE LEDS

MV 10 MV hO

MV WOA

MV bUJfl MV 5024 MV 1(174

b SI 00 GS1 00 5 SI (10 4/S1 00

4.'SI 00

4 SI 00

5 si no

\

ICS0LDERTA1L - LOW PROFILE [TIN] SOCKETS 25-49 50 100 1 M

S0LDERTAIL STANDARD (G0LDI

WIRE WRAP SOCKETS (GOLD) LEVEL =3 41 37 34 pin 510b

3G pm

.1(1 pm

50 PCS. RESISTOR ASSORTMENTS $1.75 PER ASST.

(70 OHM 56BOHM ii8ll OHM H?(I OHM

I bK 3.9K

1 BK

.1 IK

2?DK bfiOK

I70K 330K 820K

? 2M

1/4 WATT 5J:, 50 PCS. 1/4 WATT 5% ■ 50 PCS. 1/4 WATT 5*/- = 50 PCS. 1/4 WATT 5'!'.» 50 PCS. 1/4 WATT 5V.= 50 PCS. 1/4 WATT b%= 50 PCS. 1/4 WfiT5% 50 PCS.

PRIME

INTEGRATED ASST 9 CIRCUIT ASSORTMENTS ASST '°

ASST 11

SSIT

;ti!5

4002

SGST 5G7T

Satisfaction Guaranteed. $5.00 Min. Order. U.S. Funds.

California Residents — Add 6% Sales Tax

Write for FREE 1975F Catalog — Data Sheets .25« each

P.O. BOX 822, BELMONT, CA. 94002 PHONE ORDERS - (415) 592-8097

MICROPROCESSOR COMPONENTS^ 8008 -$19.95 2102 -$2.95

210? 2107

7010

91 (.02 74200 74LS07O

IK Static RAM Din

3.95

.Veclor General Purpose Loijic CARD Board 14.95

■Very High No.se Immunity ' Holds 12 ea. 14 pm DIPS "44 pin Edge Connection

THE KILOBYTE RAM CARD Per Kit $49.95

"ComplfilR I Kx8 Memory " High Noise Immunity Components •Single bv supply *b00NS Access Time SKit includes sockets. ICS 8

FREE Willi each $75 otder of Microprocessor cor S12.00 gel a one year tubseflptiort to BYTE the mat Value computer PHREAKS FREE FREE'

pom

kits EXAR ics

XR22D6KA SPECIAL S17.95

Includes monolithic function generator IC, PC board, and assembly instruction manual. XR2206KB SPECIAL $27.95

Same as XR2206KA above and includes external components fn. PC board

TIMERS

XR-565CP SPECIAL

XR-320P

XR-556CP

XR-255GCP

XR-2240CP SPECIAL

1.55 1.85 3.20 3.25

PHASE LOCKED LOOPS

XR-210 5.20

XR215 6.60

XR-567CP 1.95

XR2567CP SPECIAL 2.99

STEREO DECODERS

XR 1310P S3.20

XR 13I0EP 3.20

XR-1800P 3.20

WAVEFORM GENERATORS XR-205 8.40

XR-2206CP SPECIAL 4.49 XR-2207CP 3.85

MISCELLANEOOS

XR-2211CP

XR-2261

6.70 3.79

^Special Requested Items*

RCrtl34

(IC'1195 MSVliack Rrg

FS3GH UecuJiM

LDMO'IM DVMCIupSe.

CA3I30 Supef CMOS Op Amp

MCMDBL7 A/0

F334I FIFO

PJ8T97 S3 00

J034P 275

2S13 MOO

2518 7.00

3534 3.50

352S 6.00

2537 5.00

ZENERS-DIODES-RECTIFIERS

TYPE VOLTS

IN 746 3.3

IN75IA 5.1

IN757 5.6

IN7S3 (i?

IN754 G.B

1N965B lb

INb?32 5.G

INb234 G7

IN5235 G.B

INS236 7 b

IN45G 7b

INflb8 IbO

IN4SbA IBO

IN4001 bOPIV

IN400? IU0PIV

PRICE

4/100 4/1,00 4/1.00 4/1 00 4/1.00

TYPE VOLTS W

IN4003 200 PIV 1 AMP

IN4004 400 PIV I AMP

IN3E00 b0 200m

1U4148 /5 10ni

1N4164 35 10m

IH4734 b6 In

IN4735 62 In

IN4736 6 8 Kv

IN473B 8.2 lw IN4742 IN4744 IN 1183 IN 1184 IN 1186

50 PIV 35 AMP

100 PIV 35 AMP

?00 PIV 35 AMP

40.0 PIV 35 AMP

MPS AH5

MPS A08

?N7213A

7N777I

JW???7A

7N?^E3

7N?:tli9A

FN2415

2N74B4

7N790GA

7fJ7907A

7N7925

2N305:t

2N3055

MJE3055

5 10

s si an

5-SI 0U ZS1.M

TRANSISTORS

PN35G7 JSII

PM3SE8 47S1J

PN3SS9 «S1 I

7N37D4 SSI I

7N37D6 E.SII

7N37CIJ 5/SII

7N37Q7 S'St I

7N3711 5'S1I

2N377S S.G5

7U11}b £1 0(1

2N39D3 S/S1.I

7iN33Dfl «*( I

2N39D5 4'SI.I

?N39DG </81 i

7N40.I3 3.S1 I

?(J40U 3 SI I

PIWiB 7Ni4D0 7N440I 7N4407 7N44U3 2N44(Jij 2NS08B 7N50S7 7N50KB 2N5089 2N5129 7NBI3H 2M5139 2N52Q9 2M595I C10CP1 SCR

CAPACITOR CORNER

50 VOLT CERAMIC DISC CAPACITORS

.0022

,0047m

,01ml

15 35V

22 35V

33 3bV

4 7 35V

GB 35V

1 0 35V

19 1049 50 100

100 VOLT MYLAR FILM CAPACITORS .12 .10 07 022ml .13 .11 .0

12 10 .07 ,047ml .21 .17 I

12 .10 .07 ,1ml .27 .23 .1

12 .10 .07 22ml .33 .27 .2

• 70", DIPPED TANTALUMS (SOLID) CAPACITORS 28 .23 J7 lb 35V .30 2G

28 23 17 7.2 2bV 31 27

28 23 17 3 3 25V 31 2/

?8 23 17 4 7 2SV 37 28

?r, 23 17 6 8 25V 3G 31

7B .23 17 10 25V 40 .36

7K 23 17 l!i 25V G3 511

MINIATURE ALUMINUM ELECTROLYTIC CAPACITORS Axial Lead Radial Lead

50 3b 30 28

know what the problems arc!" Well, why not institute an in-house contest among your engineers called BUGDEBUG: Have one fellow go to a prototype and intentionally introduce a bug, then have his compatriot — without advance knowledge — get that machine and figure out what is wrong while taking notes on his methods of deducing the error.

Use of the Computer as a Debugging Tool: Above all, concentrate on getting the CPU up first in your procedures, so that it can be used as a debugging tool by the fellow who has no oscilloscope. Think about the computer as a debugger, and burn some hardware debugging routines into your ROMs.

I present these thoughts as a constructive input to all manufacturers — and as information for readers to use in the evaluation of your products. I predict that the manufacturers who do the best job documenting their kits will be the ones who prosper the most in the long run.

Standardization

As I mentioned in describing the small systems benchmark, the idea of a home computer system is best implemented with modularity. This brings up the question of standardization of interfaces, since one of the most obvious areas of modularity is in the choice of peripheral devices for a system. What are standards, and whom do they serve?

BYTE will editorially support any equipment that meets industry standards, however those standards are defined.

A standard is an agreement — de facto or by explicit choice of participants — upon a common set of parameters for some aspect of technology. In the home computer field, the de facto standard of character data is adopted without question from the computer industry at large - ASCII (Baudot Teletype interfaces use obsolete equipment and are viewed as an exception to be specially programmed). There is, however, a strong need for additional standardization in two areas, one of which I'll talk about in some detail now. These are the areas of peripheral interconnection to processors and the audio cassette data interchange standard. Work upon the interface standardization problem has already begun under the leadership of Bill Godbout in Oakland, Calif. Bill has been in and around the computer industry for a long time (he worked for IBM when IBM was anything but a giant in the field) and appreciates well the shot in the arm competition can give the development of a new area. By having plug standards, we can avoid arbitrary restrict'rons on entry into the field, thereby expanding the choices users have and giving incentives to the innovative and creative producers of personal computing products. With a peripheral standard for the industry, the inventor of "El Neato Peripheral #367" only has to worry about one interface, and can enhance the value of Bill Godbout's computer systems, as well as Sphere, MITS, SWTPC, RGS, Scelbi and yet unheard of products.

In California, there already have been several informal

\

standards meetings among

industry representatives, according to Bill in a phone conversation recently ... a trend which we at BYTE want to see continuing.

As a step in a second direction — audio cassette standards - BYTE is sponsoring an audio cassette standardization conference on November 7 and 8 in Kansas City, Kansas (see the announcement in this issue). The purpose of this conference is to act as an information exchange among the various manufacturers and users, and to hear arguments on the relative merits of various systems for audio recording of digital data. The main argument in favor of the audio standard concept — whatever technically competent system or systems are chosen — is so that the various users of small computers can freely communicate with one another by passing data tapes back and forth. We need a universal audio standard so that Joe Smyly in Podunk Hollow, Kentucky, can record his thoughts on tape and send them to his friend Fred Oberheimer in San Francisco, where Fred can display the message on his own computer's data screens or hard copy outputs.

Once a standard has been agreed upon you may be sure that BYTE will do all it can to encourage manufacturers to adhere to this standard and to publish articles explaining the systems involved, the hardware which will work with it, and software involved. Should some alternatives be proposed which seem of value, BYTE will encourage their investigation and evaluation. But once a standard has been set, it will take some powerful improvements to warrant basic changes.

Carl Helmers Editor, BYTE

92

COMPUTER-DATA INPUT KEYBOARDS

B5283

B5199

ASCII encoded keyboard. In its own enclosure. Originaly used in SANDERS ASSOCIATES 720 Terminal System. In like new condition. Usefull for any project requiring an ASCii encoded keyboard. 50 Alpha Numeric keys plus 11 computer symbols STOCK NO.B5283 keyboard $35.00 2/65.00

MICRO—SWITCH (Honeywell) 8 bit binary coded board. 56 keys, alpha - meric and computer symbols Built in TTL decoder. New in factory cartons. A beautiful keyboard. STOCK NO.B5199 Microswitch keyboard. $45.00 2/80.00

KEYTOPS & SWITCHES TO MAKE YOUR OWN KEYBOARD

We have a large selection of KEYTOPS and SWITCHES, made by RAYTHEON CO. The keytops come in black, grey and white, with contrasting legends. The switches mate with the tops, and are magnetic reed switches. The following combinations are available: 54 key typewriter set, keys only, black K9276 2.95

54 key typewriter set, keys only, grey K9278 2.95

54 key TTY set, no symbols white K9279 2.95

54 key TTY set, with symbols white K9282 2.95

54 key set, keys & switches black K9288

54 key set, keys & switches grey K9290

54 TTY set, no symbols keys & Sw. White K9291 54 TTY set, with symbols, keys & Sw. whiteK9291

11 Key Numeric set. Keys only Black

11 Key Numeric set. Keys only Grey

11 Key Numeric set, Keys only White

12 Key numeric set. Keys only white

11 Key Num.set, keys &i switches Black 11 Key Num. set, keys & switchesGrey

11 Key Num. set, keys 8t switchesWhite

12 Key Num. set, keys Si switcheswhite

Blank key 1% keys wide white

Blank key 2 keys wide white

K9297A with switch white

K9297B with switch white

K92S3 K9284 K9295 K9286

K9293 K9294 K9295 K9296

30.00 30.00 30.00 30.00

1.50 1.50 1.50 1.50

7.00 7.00 7.00 7.50

K9297A 3/.25

K9297B 3/.25

K9298A 3/2.00

K9298B 3/2.00

MINIATURE 7 SEGMENT READOUT

Miniature 7 segment LED readout (EXITON XMN 101). Displays all numbers and 9 letters. D.D. 5/16"x 1/4" Display is .12 ". SPECIAL FOR THIS ISSUE ONLY STOCK NO.B5173 with data sheet .50 ea. 5/2.00

TRANSFORMERS

Computer projects need power supplies. Finding the right power transformer can be a problem. We have one of the largest and most diversified stocks of power transformers in the country. Below we list some representative items in our inventory. Our catalog, free on request lists many more.

36 V. <s> 1.0 A. ct, 8i 6.3 V @ 200 ma. 3 lbs. 70 V. @> 1.5 A. ct, S 6.3 V § 500 ma. 6 lb. 90 V. <s> 2.0 A. ct, & 6.3 V @ 1.5 A. 8% lb. 50 V.-<°> 1.5 A. ct, & 6.3V @500 ma. 6 lb. 26 V. <s> 1.0 A. ct. &6.3 V. @ 500 ma. 3 lb. 38 V. @ 1.5 A. ct. & 6.0 V.@ 500 ma. 2 lb. 350 V. <S> 35 ma. ct. & 6.3 V. @ 2.7 A 2 lb. 70 V. <9> 1.5 A. ct. & 6.3 V @ 1.5 A. 7Lb. 35 V. <§> 6.0 Ct. & 10 V. @ 10.0 A. 6.0 Lb. 64 or 32 V. <s> 8.0 A. ct. & 18 V. @ 8.0 A ct. 10

B9313

3.50 2/6.00

B9314

6.50 2/12.00

B9315

9.95 2/19.00

B9316

6.50 2/12.00

B9318

3.75 2/7.00

B9319

6.95 2/13.00

B9321

3.50 2/6.00

B9322

6.75 2/13.00

B9906

8.95 ea.

lb. B9905 11.95

VOLTAGE REGULATOR BOARDS

B5169 is a board containing 3 15 volt high current regulators with 0.1% regulation. 2 of the regulators are rated @ 3 Amps., and the other @ 6.0 amps. The current in each regulator may be doubled with the regulation going to 0.5%.AII 3 regulators are short circuit proof, and 2 have electronic crowbar protection. Brand new, in factory boxes. STOCK NO.B5169 $11.95 ea. 2/21.00

B9013 is a triple regulator with + 12 volt regulation @ 200 ma. and the third regulator is a tracking regulator, providing regulation from 0 to 5 volta @ .5 A. STOCK NO.B9013 $5.95 ea. 2/10.00

Doth regulators above come withcircuit diagrams.

OPERATIONAL AMPLIFIERS (OP -AMPS)

TYPE

709

4709

741

747

741

747CT

1458

LM101A

DESCRIPTION

Hi Performance

Dual 709

Hi Performance

Dual 741

Hi Performance

Dual 741

Dual 741

Gen, Purpose

CASE

TO-5 DIP DIP DIP

Mini TO-5 Mini TO-5

STOCK

B4301 B5301 B4316 B4317

DIP B4345 B3111

DIP B3112 B4503

PRICE

.50

1.00

.65

1.25

.65

1.25

1.25

.50

5/2.00 6/5.00

5/3.00 5/5.00

5/3.00 5/5.00 5/5.00

5/2.00

SELF SCAN PANEL DISPLAY

f*^ Burroughs

BURROUGHS SELF SCAN display, designed for numeric application, requiring up to ~ MODEL SSD 1000-0010 . 1.6 characters of numeric ivi w u u u. information. Display is made

up of neon dot matrix. Each character is defined by a positive logic 4 bit code. Display operates in a scanning mode, scanning from left to right, one column at a time. Electronics is in inter ior of bezel, and consists of LSI chip and integrated circuits. Current distributor price is $135.00. LIMITED QUANTITY STOCK NO.5180 with data $49.50 2/90.00

Please include sufficient postage. Excess refunded MINIMUM ORDER $5.00

DELTA ELECTRONICS CO.

BOX 1, LYNN, MASSACHUSETTS 01903 Phone (617) 388-4705

Send for the latest edition of our catalog. Loaded with electronic and computer bargains.

7-Segment Readout 12-PIN DIP

Three digits with right-hand decimal

Plugs into DIP sockets

Similar to (LITRONIX) DL337

Magnified digit approximately .1"

Cathode for each digit

Segments are parallel for multiple

operation 5-10 HA per segment EACH SI.75 4 (12 DIGITS) $6.00

RCA Numitron

EACH $ 5.00

SPECIAL: 5 FOR $20.00

DR2010

*

MOS MEMORY 2102-2

1024 Bit Fully Decoded Static MOS Random Access Memory

-fast access 650ns

-fully TTL compatible

-n channel silicon gate

-single 5 volt supply

-tri-state output

-1024 by 1 bit

-chip enable input

-no clocks or refreshinq

required Brand New Factory P^rls 16 PIN DIP Each $4.00 8 for $27.95

Power Supply SPECIAL!

723 DIP variable regulator chip 1-40V, + or - output? 150 MA 10A with external pass transistor—with diagrams for many applications. EACH $1.00 10 FOR $8.95

5001 Calculator

40-Pin calculator chip will add, subtract, multiply, and divide. 12-digit display and calculate. Chain calculations. True credit balance sign output. Automatic over-flow indication. Fixed decimal point at 1, 2, 3, or 4. Leading zero suppression. Complete data supplied with chip.

CHIP AND DATA ONLY $2.49

DATA ONLY (Refundable)... $1.00 5002 LOW POWER CHIP AND DATA $12.95

High Quality PCB Mounting IC Sockets

8-PIN, 14-Pin, 16-Pin and 24-Pin PCB mounting 0NLY--no wire wrap sockets.

8-Pin $ .22

^^■A

^fl -: ^m 16-Pin $ .30

V ^W $ .75

40-Pin SI.25

All IC's iiro new and f ul ly tested. Leads are plated with gold or solder. Orders for $5.00 or more will be shipped prepaid Add 5 . jj for handling and postage for sma1ler orders; residents of California aa.i s,iU's tax. IC orders are shipped within .' workdays--ki ts are shipped within 10 days of receipt of order. S10.00 ni.-itmuir. on C.O.D.'s.

BRBVLOn

ELECTROniCS

Mail orders to: TWX » 910-367-3521

Sa?ram°nt::7CA ""one (916) 334-2161 95841 Monev back Guarantee on all goods. Send for free flyer.

1000 MHz Counter

11C05 Fairchild 1GHz Divide By Four -DC to 1000 MHz operation -AC or DC coupled -Voltage compensated -TTL or ECL power supply -50 ohm drive output -Lead compatible with Plessy SP613 -True and complement ECL outputs -14 pin DIP -Data and application notes

Each $49.95

Dale Trimmer

-12 turn trimpots which plug

into a DIP socket -5K and 200K -V x V x V' -4 leads spaced .3" x .2" Each $.65 10 for $4.95

MV50 Red Emitting 10-4 MA ? 2V

MV5024 Red T0-18 High Dome

cfc:

MV10B Visible Red 5-7 MA G> 2V

LED's

$ .20 10 FOR $1.25

$ .35 10 FOR $2.95

$ .30 10 FOR $2.50

CMOS

CD4001 $ .45

CD4O02 .45

CD4011 .45

CD4012 .45

CD4023 $ .45 74C20 .65 74C160 3.25

3-Amp Power Silicon Rectifiers

MARKED EPOXY AXIAL PACKAGE

PRV

100.

200.

400.

600.

PRICE .$.10 . .15 . .18 . .23

PRV

800..

1000.

1200.

1500.

PRICE ..$.30 .. .40

.. .50 .. .65

DiaOE ARRAY 10-1N914 silicon signal diodes in one package. 20 leads spaced. 1"; no common connections.

EACH... $ .25 10 FOR $2.25

II

7400

.20

74H51

.25

7 MOO

.30

7453

.20

7401

.20

7454

.20

74H01

.25

74L54

.25

7402

.25

74L55

.25

7403

.25

7460

.16

7404

.25

74L71

.25

74H04

.30

7472

.40

7405

.30

74L72

.60

7406

.40

7473

.35

7408

.30

74L73

.75

74H08

.30

7474

.45

7410

.20

74H74

.75

7413

.75

7475

.80

7417

.40

7476

.55

7420

.20

74L78

.70

74L20

.30

7480

.50

74H20

.30

7483

.70

74H22

.30

7489

J.00

7430

.20

7490

1.00

74H30

.30

7492

.65

74L30

.30

7493

.00

7440

.20

7495

.65

74H40

.30

74L95

.00

7442

1.00

74107

.35

7447

1.50

74145

.25

7450

.20

74180

.00

74H50

.30

74193

.50

7451

.20

74195

.65

7400 Series

DIP

25K Trimmer

PRINTED CIRCUIT BOARD TYPE EACH $.20 10 FOR $1.50

Rectifiers

VARO FULL-WAVE BRIDGE

VS647

2A

600V

$1.10

MR810 Rectifier 50V 1A $ .10

Special 811: Hex Inverter

TTL DIP Hex Inverter; pin interchangeable with SN 7404. Parts are brand new and branded Signetics and marked "811."

EACH $ .16 f!Kf

DATA 10 FOR 1.50 | OH

sheet 100 FOR 14.00 supplied 1000 FOR 110.00

WWW1

1 AMP RECTIFIER

EACH $ .15 SALE 10 for $1.00

1N4007 1KV PRV

MAN 4 7-Segment, 0-9 plus letters. Right-hand decimal point. Snaps in 14pin DIP socket or Molex. IC voltage requirements. Ideal for desk or pocket calculators!

EACH $1.20

10 OR MORE $1.00 EACH

CD-2 Counter Kit

This ki t provides a highly sophisticated display section module for clocks, counters, or other numerical display needs. The unit is .8" wide and 4 3/8" long. A single 5-volt power source powers both the ICs and the display tube. It can attain typical count rates' of up to 30 MHz and also has a lamp test, causing all 7 segments to light. Kit includes a 2-sided (with plated thru holes) fiberglass printed circuit board, a 7490, a 7475, a 7447, aDR2010 RCA Numitron display tube, complete instructions, and enough MOLEX pins for the ICs... NOTE: boards can be supplied in a single panel of up to 10 digits (with al 1 interconnects); therefore , when ordering, please specify whether you want them i n single panels or in one multiple digit board. Not specifying will result in shipping delay. COMPLETE KIT ONLY $10.95

FULLY-ASSEMBLED 'it-*: ,.,...

UNIT $15.00 ;^r:^311 Z;"75 -><«.

Boards supplied separately @ $2.50 per digit.

LI N E A R S

NE555 Precision timer 90

NE560 Phase lock loop DIP 2.95

NE561 Phase lock loop DIP 3.00

NE565 Phase lock loop 2.95

NE566 Function generator T0-5 3.50

NE567 Tone decoder TO-5 3.50

709 Popular Op Amp DIP 40

710 Voltage comparator DIP 60

711 Dual comparator DIP 45

723 Precision voltage regulator DIP 1.00

741 Op amp T0-5/MINI DIP 4 5

748 Op Amp TO-5 80

CA3018 2 Isolated transistors and a Darlington-connected transistor pair 1.00

CA3045 5 NPN transistor array l.OO

LM100 Positive DC regulator TO-5 1.00

LM105 Voltage regulator 1.25

LM302 Op Amp voltage follower TO-5 1.25

LM308 Op Amp TO-5 2.00

LM309H 5V 200 MA power supply TO-5 1.00

LM309K 5V 1A power supply module TO-3 1.00

LM311 Comparator Mini. 1.75

LM370 AGC amplifier 1.7 5

LM380 2-Watt Audio Amp 1.7 5

LM1595 4-Quadrant multiplier 1.70

MC1536T Op Amp 1.3 5

94

DATA PUMPS BY ULTRONICS

Manufactured by ULTRONICS (Sylvania) from phased out equipment. Apparent good condition, several models. No data available.

#SP-301 121b $35.00 3/$100

SOPHISTICATED LOGIC SUPPLIES

By Dressen-Barnes and NJE. Transistorized, finely filtered and regulated. 115 volt input.

#61-5S Output 5VDC 21 Amp 27 lb $47.50

#51-5S Output 5VDC 10.5 Amp 161b 35.00

#421-32 Output 32VDC3.3 Amp 12 1b 20.00

#421-90 Output 90VDC 1.2 Amp 12 1b 20.00

#NJE 5VDC34 Amp 35 lb 75.00

MEMORY SYSTEM $125.00

New memory system by Honeywell, small . . . measures only 9x4x1 inches. 1024 core memory, 1024 words with 8,9,10 bits/word. Random access, with all logic, register, timing, control, core select and sense functions in one package. New, booklet of schematics and data. Looks like a good beginning for a mini-computer. Limited supply on hand. Ship wgt 3 lbs. #SP-79 $125.00

■ ^SBSte

SSI

1,000 uF

15 volt

$ .35

2,000 mF

35 volt

1.00

2,000

15

.50

19,500

25

$2.50

1,000

25

.70

12,000

40

2.50

3,000

25

1.00

3,900

50

2.00

1,000

35

.80

22,000

75

3.25

COMPUTER

CAPS

BRAND

NEW

CORE MEMORY

Another brand new memory, ultra small. Measures only 4x4 inches with format on one plane of 32 x 32 x 16 (16,384). Only about 35 units of this on hand. #SP-81 $20.00

SANDERS 720 KEYBOARD $40.00

yffe£nM<2.

FREE CATALOG

Please add shipping cost on above.

MESHNA P0 Bx 62 E. Lynn Mass. 01904

95

BOTE

reader !rvi

To get further information on the products advertised in this issue of BYTE merely tear, rip, or snip out this advertiser index, fill out the data at the bottom of the page, mark the appropriate boxes, and send the works to BYTE, Peterborough NH 03458. Readers get extra Brownie Points for sending for information since this encourages advertisers to keep using BYTE — which in turn brings you a bigger BYTE.

ADVERTISER INDEX

□ American Cancer Society 74 D A. P. Products 4

□ Babylon 94

□ Byte Subscriptions 81

□ Celdat 82

□ Centi-Byte 87

□ CMR 83

□ Continental Specialties Clll d Delta 93

a Delta t 71

□ Godbout 18, 19

□ Hickok 51, 63

□ International Elec. Unltd. 89

□ James Electronics 83,91

□ Martin Research 1

□ Meshna 95

□ Micro Digital 41

□ MITS C IV, 48-50

□ Processor Technology 73,75

□ RGS 2

□ Scelbi 34, 35

□ S. D. Sales 87

□ Southwest Technical CM

□ Sphere 8, 9, 10

□ Suntronix 76

□ Teleterminal 71 n Visulex 92

Q Windjammer 80

Messages for the editor:

Reader's Service

BYTE

Green Publishing Inc.

Peterborough NH 03458

Please print or type.

Name

NOVEMBER 1975

BYTE acquired via

□ Subscription

□ Newsstand □Stolen

Address

City

State Zip

Coupon expires in 60 days. . .

from page 5

at the same time simultaneously so I need to have a serial interface doohinky instead of a parallel doohinky. Luckily MITS has just such a gadget for the Altair, the 88-SIOC, it is called. Once I get this magic board plugged into the Altair I can install a jack to plug in a Teletype. It'll make me feel a lot better.

Not that this is any put down of the Altair for I notice that for some odd reason computers have historically been built without terminals all over the back panel. Let me provide some sage advice to computer designers: Put connectors all over the back panel and make your equipment look like other electronic gear. Stop already with the mystique that computers are something holy and different. They are full of busy electrons like anything else and they should look right.

NEED FOR STANDARDS

The growth of computer systems should be facilitated by some agreement between hobbyists and industry on standards of interface and control. The day may soon arrive when computers are built with standardized connectors in the back for plugging in serial or parallel fed teletype units, television typewriters, cassette recorders, modems, floppy disk drives, etc.

If BYTE can help with this, so much the better. BYTE hereby asks all interested parties to submit papers in support of their proposals for interconnection standards for I/O and memory storage devices. Agreement is important on the standards of interconnection and control, as well as the type of connector to be used. Speak now or hold your peace.

Classified Ads Available for Individuals and Clubs

Readers who have equipment to buy, sell or swap should send in a clearly typed or printed notice to that effect. Insertions shoufd be Jimited to approximately 100 words or Jess. Advertisements for this feature can be accepted from individuals or bona-fide clubs of computer users only. Commercial advertisers should contact Bill Edwards, BYTE advertising manager, for the latest rate card and terms. Individual /club classifieds will be printed on a space-available basis in the earliest possible issue of BYTE.

96

At last! High quality, laboratory-grade test instruments... for the professional and hobbyist... at prices everyone can afford!

CIRCUIT DESIGNER

Now you can build/test electronic circuits WITHOUT SOLDER . .. using solid #22 AWG wire to interconnect discrete components . .. resistors, transistors, linear/digital ICs in T05 or DIP packages (8-40 pins), and more. Plus, you get 5-15VDC up to 600ma (9 watts) of variable regulated power, with a built-in 0-15V voltmeter to monitor internal power and/or external circuits. Now, that's design flexibility! And look at the low, low price!

Add $2.50 shipping/handling

SPECIFICATIONS

Power Supply: Output: 5-15V @ 600ma Ripple and Noise: less than 20mv @ full load. Load/Line regulation: <1%. Meter: 0-15V DC. Connectors: 1 QT-59S, 2 QT-59B, 2 power supply 5-way binding posts, 2 meter 5-way binding posts. Wght: 3 lbs. Power Needed: 117V, AC @ 60 Hz 12W.' Patent #235,554.

FUNCTION GENERATOR

Troubleshooting? Design Testing? DM-2 gives you all the signal source capacity you need ... at a very modest price. This 3-wave form Function Generator has: short-proof output, variable signal amplitude and constant output impedance. Completely wired, tested, calibrated, ready to test audio amplifiers, op-amp and educational lab designs ... as well as complex industrial lab projects. Complete with easy-to-read instructions/operations manual, application notes, operation theory and more, DM-2 works hand-in-hand with DM-1 for total versatility.

SPECIFICATIONS

Frequency Range: 1Hz-100KHz (5 ranges: 1-10Hz, 10-100HZ, 100-1000HZ, 1-10KHz, 10-100KHz). Dial Accuracy: Calibrated @ 10Hz. 100Hz, IKHz. 10KHz, freq. accurate to 5% of dial setting. Wave Forms: Sine <2% THD over freq. range. Triangle wave linearity, < 1% over range. Square wave rise/fall <0.5 microseconds — 600U-20pf termination. Output Amplitude: (all wave forms) variable-0.1V-10V peak to peak into open circuit. Output Impedance: 60011-constant over ampl./freq. ranges. Wght.: 2 lbs. Power Needed: 117V. AC @ 60Hz 5W.*

R/C BRIDGE

Have you been bugged by color codes or unreadable component markings? Forget it! DM-3, the low cost R/C Bridge, measures true component values ... in seconds ... to better than 5%. And, it's all done with only 2 operating controls and a unique solid-state null detector, to zero-in on exact component selection . . . instantly! Completely wired, calibrated and tested, DM-3 includes an extensive instruction/applications manual, and operational theory too.

SPECIFICATIONS

Resistance Range: 100-100 megil. (6 Ranges: 10-100U, 100-1000S1, 1K-10KU, 100K-1 megil, 1 megil-10 megil) Capacitance Range: 10pFd-tmFd(5 Ranges: 10-100 pFd. 100-1000pFd, .001-.01 mFd. .01mFd-.1mFd, .1- 1.mFd.) Null Detector.: 2 hi-intensity LEDs-hi/lo markings. Accuracy: <5% of null dial, range switch setting. Wght. 2 lbs. Power Needed: 117V, AC @ 60Hz 3W.*

54

95

Add $2.50 shipping/handling j$^

»

Each measures 6.75"L x 7.5"W x 3.25" H.; completely assembled, ready to start testing at once. Order your DESIGN MATES today! '220V @ 50Hz available at slightly higher cost.

All DESIGN MATES are made in USA; available off-the-shelf from your local distributor. Direct purchases from CSC can be charged on Bank Americard, Master Charge, American Express. Plus, you get a FREE English/Metric Conversion Slide Rule with each order. Foreign orders please add 10% for shipping/handling. Prices are subject to change.

conTinerrmi /pecifiirie/ corporatioti

44 Kendall Street, Box 1942, New Haven, CT 06509 • 203/624-3103 West Coast Office: Box 7809, San Francisco, CA 94119 • 415/421-8872

Canada: Len Finkler Ltd., Ontario

© Copyright Continental Specialties Corporation 1975

Tke MITS Altair 8800

(It's showing up in some or

the most unusual places.)